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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� A40MX04-FPQ100
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 80/142闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA MX SGL CHIP 6K 100-PQFP
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绯诲垪锛� MX
杓稿叆/杓稿嚭鏁�(sh霉)锛� 69
闁€鏁�(sh霉)锛� 6000
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瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 70°C
灏佽/澶栨锛� 100-BQFP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 100-PQFP锛�14x20锛�
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40MX and 42MX FPGA Families
1- 38
R e v i sio n 1 1
Table 1-25 40MX Temperature and Voltage Derating Factors
(Normalized to TJ = 25掳C, VCC = 3.3 V)
40MX Voltage
Temperature
鈥�55掳C
鈥�40掳C
0掳C
25掳C
70掳C
85掳C
125掳C
3.00
1.08
1.12
1.21
1.26
1.50
1.64
2.00
3.30
0.86
0.89
0.96
1.00
1.19
1.30
1.59
3.60
0.83
0.85
0.92
0.96
1.14
1.25
1.53
Note:
This derating factor applies to all routing and propagation delays.
Figure 1-36 40MX Junction Temperature and Voltage Derating Curves
(Normalized to TJ = 25掳C, VCC = 3.3 V)
3.00
3.30
3.60
Voltage (V)
g
0.60
0.80
1.00
1.20
1.40
1.60
1.80
2.00
2.20
55C
40C
0C
25C
70C
85C
125C
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A40MX04-FPQ100ES 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:40MX and 42MX FPGA Families
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