鍨嬭櫉(h脿o)锛� | A40MX04-3PL44 |
寤犲晢锛� | Microsemi SoC |
鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 80/142闋�(y猫) |
鏂囦欢澶�?銆�?/td> | 0K |
鎻忚堪锛� | IC FPGA MX SGL CHIP 6K 44-PLCC |
妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 27 |
绯诲垪锛� | MX |
杓稿叆/杓稿嚭鏁�(sh霉)锛� | 34 |
闁€鏁�(sh霉)锛� | 6000 |
闆绘簮闆诲锛� | 3 V ~ 3.6 V锛�4.75 V ~ 5.25 V |
瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
宸ヤ綔婧害锛� | 0°C ~ 70°C |
灏佽/澶栨锛� | 44-LCC锛圝 褰㈠紩绶氾級 |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 44-PLCC锛�16.59x16.59锛� |
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
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A40MX04-3PLG44 | IC FPGA MX SGL CHIP 6K 44-PLCC |
A3P1000-2FG144 | IC FPGA 1KB FLASH 1M 144-FBGA |
M1A3P1000-2FG144 | IC FPGA M1 1KB FLASH 1M 144FPGA |
ACB70DHHR | CONN EDGECARD 140PS .050 DIP SLD |
ABB70DHHR | CONN EDGECARD 140PS .050 DIP SLD |
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
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A40MX04-3PL44I | 鍔熻兘鎻忚堪:IC FPGA MX SGL CHIP 6K 44-PLCC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:MX 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛� |
A40MX04-3PL44M | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:Field Programmable Gate Array (FPGA) |
A40MX04-3PL68 | 鍔熻兘鎻忚堪:IC FPGA MX SGL CHIP 6K 68-PLCC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:MX 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛� |
A40MX04-3PL68I | 鍔熻兘鎻忚堪:IC FPGA MX SGL CHIP 6K 68-PLCC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:MX 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛� |
A40MX04-3PL68M | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:Field Programmable Gate Array (FPGA) |