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ProASIC3 nano Flash FPGAs
Revision 11
2-61
Figure 2-28 RAM Write, Output Retained. Applicable to both RAM4K9 and RAM512x18.
Figure 2-29 RAM Write, Output as Write Data (WMODE = 1). Applicable to both RAM4K9 only.
tCYC
tCKH
tCKL
A0
A1
A2
DI0
DI1
tAS
tAH
tBKS
tENS
tENH
tDS
tDH
CLK
BLK
WEN
[R|W]ADDR
DIN|WD
Dn
DOUT|RD
tBKH
D2
tCYC
tCKH
tCKL
A0
A1
A2
DI0
DI1
tAS tAH
tBKS
tENS
tDS tDH
CLK
BLK
WEN
ADDR
DIN
tBKH
DOUT
(pass-through)
DI1
Dn
DI0
DOUT
(pipelined)
DI0
DI1
Dn
DI2