參數(shù)資料
型號(hào): A3PN060-FVQG100
元件分類: FPGA
英文描述: FPGA, 1536 CLBS, 60000 GATES, PQFP100
封裝: 14 X 14 MM, 1.20 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VQFP-100
文件頁(yè)數(shù): 67/92頁(yè)
文件大?。?/td> 3184K
代理商: A3PN060-FVQG100
ProASIC3 nano Device Overview
Ad vance v0.4
1-3
Advanced Flash Technology
ProASIC3 nano devices offer many benefits, including nonvolatility and reprogrammability through
an advanced flash-based, 130-nm LVCMOS process with seven layers of metal. Standard CMOS
design techniques are used to implement logic and control functions. The combination of fine
granularity, enhanced flexible routing resources, and abundant flash switches allows for very high
logic utilization without compromising device routability or performance. Logic functions within
the device are interconnected through a four-level routing hierarchy.
Advanced Architecture
The proprietary ProASIC3 nano architecture provides granularity comparable to standard-cell
ASICs. The ProASIC3 nano device consists of five distinct and programmable architectural features
FPGA VersaTiles
Dedicated FlashROM
Dedicated SRAM/FIFO memory
Extensive CCCs and PLLs
Advanced I/O structure
Note: *Bank 0 for the A3PN030 device
Figure 1-1 ProASIC3 Device Architecture Overview with Two I/O Banks and No RAM
(A3PN010 and A3PN030)
VersaTile
I/Os
User Nonvolatile FlashROM
Charge Pumps
Bank 1*
Bank
1
Bank
0
Bank 1
CCC-GL
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