1-2 Revision 13 Single Chip Flash-based FPGAs store their configuration information in on-chip flash cells" />
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    參數(shù)資料
    型號: A3PE600-PQ208I
    廠商: Microsemi SoC
    文件頁數(shù): 141/162頁
    文件大小: 0K
    描述: IC FPGA 600000 GATES 208-PQFP
    標(biāo)準(zhǔn)包裝: 24
    系列: ProASIC3E
    RAM 位總計: 110592
    輸入/輸出數(shù): 147
    門數(shù): 600000
    電源電壓: 1.425 V ~ 1.575 V
    安裝類型: 表面貼裝
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 208-BFQFP
    供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
    ProASIC3E Device Family Overview
    1-2
    Revision 13
    Single Chip
    Flash-based FPGAs store their configuration information in on-chip flash cells. Once programmed, the
    configuration data is an inherent part of the FPGA structure, and no external configuration data needs to
    be loaded at system power-up (unlike SRAM-based FPGAs). Therefore, flash-based ProASIC3E FPGAs
    do not require system configuration components such as EEPROMs or microcontrollers to load device
    configuration data. This reduces bill-of-materials costs and PCB area, and increases security and system
    reliability.
    Instant On
    Flash-based ProASIC3E devices support Level 0 of the Instant On classification standard. This feature
    helps in system component initialization, execution of critical tasks before the processor wakes up, setup
    and configuration of memory blocks, clock generation, and bus activity management. The Instant On
    feature of flash-based ProASIC3E devices greatly simplifies total system design and reduces total
    system cost, often eliminating the need for CPLDs and clock generation PLLs that are used for these
    purposes in a system. In addition, glitches and brownouts in system power will not corrupt the
    ProASIC3E device's flash configuration, and unlike SRAM-based FPGAs, the device will not have to be
    reloaded when system power is restored. This enables the reduction or complete removal of the
    configuration PROM, expensive voltage monitor, brownout detection, and clock generator devices from
    the PCB design. Flash-based ProASIC3E devices simplify total system design and reduce cost and
    design risk while increasing system reliability and improving system initialization time.
    Firm Errors
    Firm errors occur most commonly when high-energy neutrons, generated in the upper atmosphere, strike
    a configuration cell of an SRAM FPGA. The energy of the collision can change the state of the
    configuration cell and thus change the logic, routing, or I/O behavior in an unpredictable way. These
    errors are impossible to prevent in SRAM FPGAs. The consequence of this type of error can be a
    complete system failure. Firm errors do not exist in the configuration memory of ProASIC3E flash-based
    FPGAs. Once it is programmed, the flash cell configuration element of ProASIC3E FPGAs cannot be
    altered by high-energy neutrons and is therefore immune to them. Recoverable (or soft) errors occur in
    the user data SRAM of all FPGA devices. These can easily be mitigated by using error detection and
    correction (EDAC) circuitry built into the FPGA fabric.
    Low Power
    Flash-based ProASIC3E devices exhibit power characteristics similar to an ASIC, making them an ideal
    choice for power-sensitive applications. ProASIC3E devices have only a very limited power-on current
    surge and no high-current transition period, both of which occur on many FPGAs.
    ProASIC3E devices also have low dynamic power consumption to further maximize power savings.
    Advanced Flash Technology
    The ProASIC3E family offers many benefits, including nonvolatility and reprogrammability through an
    advanced flash-based, 130-nm LVCMOS process with seven layers of metal. Standard CMOS design
    techniques are used to implement logic and control functions. The combination of fine granularity,
    enhanced flexible routing resources, and abundant flash switches allows for very high logic utilization
    without compromising device routability or performance. Logic functions within the device are
    interconnected through a four-level routing hierarchy.
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    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    A3PE600-PQ896 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
    A3PE600-PQ896ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
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    A3PE600-PQ896PP 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
    A3PE600-PQG208 功能描述:IC FPGA 600000 GATES 208-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:ProASIC3E 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA(17x17)