Revision 13 2-41 Table 2-51 3.3 V LVTTL / 3.3 V LVCMOS Low Slew Commercial-Case Conditions: T" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� A3P400-1PQ208I
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 172/220闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA 1KB FLASH 400K 208-PQFP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 24
绯诲垪锛� ProASIC3
RAM 浣嶇附瑷堬細 55296
杓稿叆/杓稿嚭鏁�(sh霉)锛� 151
闁€鏁�(sh霉)锛� 400000
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 208-BFQFP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 208-PQFP锛�28x28锛�
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ProASIC3 Flash Family FPGAs
Revision 13
2-41
Table 2-51 3.3 V LVTTL / 3.3 V LVCMOS Low Slew
Commercial-Case Conditions: TJ = 70掳C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
Applicable to Advanced I/O Banks
Drive
Strength
Equiv.
Software
Default
Drive
Strength
Option1
Speed
Grade
tDOUT
tDP
tDIN tPY tEOUT tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
100 A
2 mA
Std.
0.60
15.86 0.04 1.54 0.43 15.86 13.51 4.09 3.80 19.25 16.90
ns
鈥�1
0.51
13.49 0.04 1.31 0.36 13.49 11.49 3.48 3.23 16.38 14.38
ns
鈥�2
0.45
11.84 0.03 1.15 0.32 11.84 10.09 3.05 2.84 14.38 12.62
ns
100 A
4 mA
Std.
0.60
11.25 0.04 1.54 0.43 11.25 9.54 4.61 4.70 14.64 12.93
ns
鈥�1
0.51
9.57 0.04 1.31 0.36
9.57
8.11 3.92 4.00 12.46 11.00
ns
鈥�2
0.45
8.40 0.03 1.15 0.32
8.40
7.12 3.44 3.51 10.93 9.66
ns
100 A
6 mA
Std.
0.60
11.25 0.04 1.54 0.43 11.25 9.54 4.61 4.70 14.64 12.93
ns
鈥�1
0.51
9.57 0.04 1.31 0.36
9.57
8.11 3.92 4.00 12.46 11.00
ns
鈥�2
0.45
8.40 0.03 1.15 0.32
8.40
7.12 3.44 3.51 10.93 9.66
ns
100 A
8 mA
Std.
0.60
8.63 0.04 1.54 0.43
8.63
7.39 4.96 5.28 12.02 10.79
ns
鈥�1
0.51
7.34 0.04 1.31 0.36
7.34
6.29 4.22 4.49 10.23 9.18
ns
鈥�2
0.45
6.44 0.03 1.15 0.32
6.44
5.52 3.70 3.94 8.98
8.06
ns
100 A
16 mA
Std.
0.60
8.05 0.04 1.54 0.43
8.05
6.93 5.03 5.43 11.44 10.32
ns
鈥�1
0.51
6.85 0.04 1.31 0.36
6.85
5.90 4.28 4.62 9.74
8.78
ns
鈥�2
0.45
6.01 0.03 1.15 0.32
6.01
5.18 3.76 4.06 8.55
7.71
ns
100 A
24 mA
Std.
0.60
7.50 0.04 1.54 0.43
7.50
6.90 5.13 6.00 10.89 10.29
ns
鈥�1
0.51
6.38 0.04 1.31 0.36
6.38
5.87 4.36 5.11 9.27
8.76
ns
鈥�2
0.45
5.60 0.03 1.15 0.32
5.60
5.15 3.83 4.48 8.13
7.69
ns
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is 卤100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
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