Revision 13 2-89 Timing Characteristics Table 2-148 2.5 V GTL+ 鈥� Applies to 1.5 V DC Core Voltage
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鍨嬭櫉锛� A3P250L-FG144
寤犲晢锛� Microsemi SoC
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鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC FPGA 1KB FLASH 250K 144-FBGA
妯欐簴鍖呰锛� 160
绯诲垪锛� ProASIC3L
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杓稿叆/杓稿嚭鏁�(sh霉)锛� 97
闁€鏁�(sh霉)锛� 250000
闆绘簮闆诲锛� 1.14V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 70°C
灏佽/澶栨锛� 144-LBGA
渚涙噳鍟嗚ō鍌欏皝瑁濓細 144-FPBGA锛�13x13锛�
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ProASIC3L Low Power Flash FPGAs
Revision 13
2-89
Timing Characteristics
Table 2-148 2.5 V GTL+ 鈥� Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70掳C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 2.3 V VREF = 1.0 V
Applicable to Pro I/O Banks
Speed
Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
tZLS
tZHS
Units
Std.
0.59
1.99
0.04
2.05
0.38
2.02
1.89
4.03
3.90
ns
鈥�1
0.50
1.69
0.03
1.75
0.33
1.72
1.61
3.43
3.32
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-16 on page 2-12 for derating
values.
Table 2-149 2.5 V GTL+ 鈥� Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70掳C, Worst-Case VCC = 1.14 V,
Worst-Case VCCI = 2.3 V VREF = 1.0 V
Applicable to Pro I/O Banks
Speed
Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
tZLS
tZHS
Units
Std.
0.77
1.99
0.05
2.05
0.50
2.02
1.89
4.03
3.90
ns
鈥�1
0.66
1.69
0.04
1.75
0.43
1.72
1.61
3.43
3.32
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-16 on page 2-12 for derating
values.
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