2-2 Revision 13 Table 2-2 Recommended Operating Conditions
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鍨嬭櫉锛� A3P1000-1FG144T
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 68/220闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA 1KB FLASH 1M 144-FBGA
妯�(bi膩o)婧栧寘瑁濓細 160
绯诲垪锛� ProASIC3
RAM 浣嶇附瑷堬細 147456
杓稿叆/杓稿嚭鏁�(sh霉)锛� 97
闁€鏁�(sh霉)锛� 1000000
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� -40°C ~ 125°C
灏佽/澶栨锛� 144-LBGA
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ProASIC3 DC and Switching Characteristics
2-2
Revision 13
Table 2-2 Recommended Operating Conditions 1,2
Symbol
Parameters 1
Commercial
Industrial
Units
TA
Ambient temperature
0 to +70
-40 to +85
掳C
TJ
Junction temperature
0 to 85
-40 to 100
掳C
VCC3
1.5 V DC core supply voltage
1.425 to 1.575
V
VJTAG
JTAG DC voltage
1.4 to 3.6
V
VPUMP
Programming voltage
Programming Mode 4
3.15 to 3.45
V
Operation 5
0 to 3.6
V
VCCPLL
Analog power supply (PLL)
1.425 to 1.575
V
VCCI and VMV 6 1.5 V DC supply voltage
1.425 to 1.575
V
1.8 V DC supply voltage
1.7 to 1.9
V
2.5 V DC supply voltage
2.3 to 2.7
V
3.3 V DC supply voltage
3.0 to 3.6
V
3.3 V wide range DC supply voltage 7
2.7 to 3.6
V
LVDS/B-LVDS/M-LVDS differential I/O
2.375 to 2.625
V
LVPECL differential I/O
3.0 to 3.6
V
Notes:
1. All parameters representing voltages are measured with respect to GND unless otherwise specified.
2. To ensure targeted reliability standards are met across ambient and junction operating temperatures, Microsemi
recommends that the user follow best design practices using Microsemi鈥檚 timing and power simulation tools.
3. The ranges given here are for power supplies only. The recommended input voltage ranges specific to each I/O
standard are given in Table 2-18 on page 2-18.
4. The programming temperature range supported is Tambient = 0掳C to 85掳C.
5. VPUMP can be left floating during operation (not programming mode).
6. VMV and VCCI should be at the same voltage within a given I/O bank. VMV pins must be connected to the
corresponding VCCI pins. See the "VMVx I/O Supply Voltage (quiet)" section on page 3-1 for further information.
7. 3.3 V wide range is compliant to the JESD8-B specification and supports 3.0 V VCCI operation.
Table 2-3 Flash Programming Limits 鈥� Retention, Storage and Operating Temperature1
Product
Grade
Programming
Cycles
Program Retention
(biased/unbiased)
Maximum Storage
Temperature TSTG (掳C) 2
Maximum Operating
Junction Temperature TJ (掳C) 2
Commercial
500
20 years
110
100
Industrial
500
20 years
110
100
Notes:
1. This is a stress rating only; functional operation at any condition other than those indicated is not implied.
2. These limits apply for program/data retention only. Refer to Table 2-1 on page 2-1 and Table 2-2 for device operating
conditions and absolute limits.
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
RMA49DTMS CONN EDGECARD 98POS R/A .125 SLD
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A3P1000-1FGG144T IC FPGA 1KB FLASH 1M 144-FBGA
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RSA49DTAS CONN EDGECARD 98POS R/A .125 SLD
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