Revision 13 2-21 Summary of I/O Timing Characteristics 鈥� Default I/O Software Settings Table 2-22
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� A3P030-1QNG132
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 150/220闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA 1KB FLASH 30K 132-QFN
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 348
绯诲垪锛� ProASIC3
杓稿叆/杓稿嚭鏁�(sh霉)锛� 81
闁€鏁�(sh霉)锛� 30000
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 70°C
灏佽/澶栨锛� 132-WFQFN
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 132-QFN锛�8x8锛�
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ProASIC3 Flash Family FPGAs
Revision 13
2-21
Summary of I/O Timing Characteristics 鈥� Default I/O Software
Settings
Table 2-22 Summary of AC Measuring Points
Standard
Measuring Trip Point (Vtrip)
3.3 V LVTTL / 3.3 V LVCMOS
1.4 V
3.3 V LVCMOS Wide Range
1.4 V
2.5 V LVCMOS
1.2 V
1.8 V LVCMOS
0.90 V
1.5 V LVCMOS
0.75 V
3.3 V PCI
0.285 * VCCI (RR)
0.615 * VCCI (FF)
3.3 V PCI-X
0.285 * VCCI (RR)
0.615 * VCCI (FF)
Table 2-23 I/O AC Parameter Definitions
Parameter
Parameter Definition
tDP
Data to Pad delay through the Output Buffer
tPY
Pad to Data delay through the Input Buffer
tDOUT
Data to Output Buffer delay through the I/O interface
tEOUT
Enable to Output Buffer Tristate Control delay through the I/O interface
tDIN
Input Buffer to Data delay through the I/O interface
tHZ
Enable to Pad delay through the Output Buffer鈥擧igh to Z
tZH
Enable to Pad delay through the Output Buffer鈥擹 to High
tLZ
Enable to Pad delay through the Output Buffer鈥擫ow to Z
tZL
Enable to Pad delay through the Output Buffer鈥擹 to Low
tZHS
Enable to Pad delay through the Output Buffer with delayed enable鈥擹 to High
tZLS
Enable to Pad delay through the Output Buffer with delayed enable鈥擹 to Low
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
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