參數(shù)資料
型號: A3979SLP-T
廠商: Allegro MicroSystems, Inc.
英文描述: MODULE RABBITCORE RCM3750
中文描述: 微步驅(qū)動器,帶有翻譯的DMOS
文件頁數(shù): 7/14頁
文件大?。?/td> 330K
代理商: A3979SLP-T
7
26184.23
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
A3979
DMOS Microstepping Driver with Translator
Functional Description
Device Operation.
The A3979 is a complete micro-
stepping motor driver with a built-in translator for easy
operation with minimal control lines. It is designed to
operate bipolar stepper motors in full-, half-, quarter-, and
sixteenth-step modes. The currents in each of the two output
full-bridges (all of the N-channel MOSFETs) are regulated
with fixed off-time PMW (pulse width modulated) control
circuitry. At each step, the current for each full-bridge is
set by the value of its external current-sense resistor (R
S1
or R
S2
), a reference voltage (V
REF
), and the output voltage
of its DAC (which in turn is controlled by the output of the
translator).
At power-on or reset, the translator sets the DACs and the
phase current polarity to the initial Home state (shown in
figures 2 through 5), and the current regulator to Mixed
decay mode for both phases. When a step command signal
occurs on the STEP input, the translator automatically
sequences the DACs to the next level and current polarity.
(See table 2 for the current-level sequence.) The microstep
resolution is set by the combined effect of inputs MS1 and
MS2
,
as shown in table 1.
While stepping is occurring, if the next output level of the
DACs is lower than the immediately preceeding output
level, then the decay mode (Fast, Slow, or Mixed) for the
active full bridge is set by the PFD input. If the next DAC
output level is higher than or equal to the preceeding level,
then the decay mode for that full bridge will be Slow decay.
This automatic current-decay selection improves microstep-
ping performance by reducing the distortion of the current
waveform due to back EMF of the motor.
RESET Input ( ˉR ˉE ˉS ˉE ˉT ).
The ˉˉˉ ˉˉ ˉ
input (active
low) sets the translator to a predefined Home state (shown
in figures 2 through 5), and turns off all of the DMOS out-
puts. The HOME output goes low and all STEP inputs are
ignored until the ˉˉˉ ˉˉ ˉ
input is set to high.
Home Output
(HOME)
.
The HOME output is a logic
output indicator of the initial state of the translator. At
power-on, the translator is reset to the Home state (shown in
figures 2 through 5).
Step Input
(STEP)
.
A low-to-high transition on the
STEP input sequences the translator and advances the motor
one increment. The translator controls the input to the DACs
and the direction of current flow in each winding. The size
of the increment is determined by the combined state of
inputs MS1 and MS2 (see table 1).
Microstep Select
(MS1 and MS2).
The input on
terminals MS1 and MS2 selects the microstepping format,
as shown in table 1. Any changes made to these inputs do not
take effect until the next rising edge of a step command signal
on the STEP input.
Direction Input
(DIR).
The state of the DIR input deter-
mines the direction of rotation of the motor. Any changes
made to this input does not take effect until the next rising
edge of a step command signal on the STEP input.
Internal PWM Current Control.
Each full bridge is
controlled by a fixed–off-time PWM current-control circuit
that limits the load current to a desired value, I
TRIP
. Initially,
a diagonal pair of source and sink MOS outputs are enabled
and current flows through the motor winding and the current
sense resistor, R
S
x
. When the voltage across R
S
x
equals the
DAC output voltage, the current-sense comparator resets the
PWM latch. The latch then turns off either the source MOS-
FETs (when in Slow decay mode) or the sink and source
MOSFETs (when in Fast or Mixed decay mode).
The maximum value of current limiting is set by the selec-
tion of R
S
and the voltage at the V
REF
input with a transcon-
ductance function approximated by:
I
TRIP
max = V
REF
/8R
S
The DAC output reduces the V
REF
output to the cur-
rent-sense comparator in precise steps (see table 2 for
%
I
TRIP
max
at each step).
I
TRIP
= (% I
TRIP
max/100) I
TRIP
max
It is critical that the maximum rating (0.5 V) on either the
SENSE1 and SENSE2 pins is not exceeded. For full step-
ping, V
REF
can be applied up to the maximum rating of V
DD
because the peak sense value is 0.707 × V
REF
/ 8. In all other
modes, V
REF
should not exceed 4 V.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A3979SLP-T 制造商:Allegro MicroSystems 功能描述:DMOS Driver
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