參數(shù)資料
型號: A29L400ATM-90UF
廠商: AMIC Technology Corporation
英文描述: 512K X 8 Bit / 256K X 16 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory
中文描述: 為512k × 8位/ 256 × 16位的CMOS 3.0伏只,引導扇區(qū)閃存
文件頁數(shù): 32/38頁
文件大小: 539K
代理商: A29L400ATM-90UF
A29L400A Series
PRELIMINARY
(July, 2005, Version 0.0)
31
AMIC Technology, Corp.
Erase and Programming Performance
Parameter
Typ. (Note 1)
1.0
Max. (Note 2)
8
Unit
sec
Comments
Sector Erase Time
Chip Erase Time
10
sec
Excludes 00h programming prior
to erasure
Byte Programming Time
5
300
μ
s
Word Programming Time
7
7
500
18
μ
s
sec
Byte Mode
Chip Programming Time
(Note 3)
Word Mode
5
12
sec
Excludes system-level overhead
(Note 5)
Notes:
1. Typical program and erase times assume the following conditions: 25
°
C, 3.0V VCC, 10,000 cycles. Additionally, programming
typically assumes checkerboard pattern.
2. Under worst case conditions of 90
°
C, VCC = 2.7V, 100,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum byte program time listed. If the maximum byte program time given is exceeded, only then
does the device set I/O
5
= 1. See the section on I/O
5
for further information.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See Table 5
for further information on command definitions.
6. The device has a guaranteed minimum erase and program cycle endurance of 10,000 cycles.
Latch-up Characteristics
Description
Min.
Max.
Input Voltage with respect to VSS on all I/O pins
-1.0V
VCC+1.0V
VCC Current
-100 mA
+100 mA
Input voltage with respect to VSS on all pins except I/O pins
(including A9,
OE
and
RESET
)
-1.0V
12.5V
Includes all pins except VCC. Test conditions: VCC = 5.0V, one pin at time.
TSOP and SOP Pin Capacitance
Parameter Symbol
Parameter Description
Test Setup
Typ.
Max.
Unit
C
IN
Input Capacitance
V
IN
=0
6
7.5
pF
C
OUT
Output Capacitance
V
OUT
=0
8.5
12
pF
C
IN2
Control Pin Capacitance
V
IN
=0
7.5
9
pF
Notes:
1. Sampled, not 100% tested.
2. Test conditions T
A
= 25
°
C, f = 1.0MHz
Data Retention
Parameter
Test Conditions
Min
Unit
150
°
C
10
Years
Minimum Pattern Data Retention Time
125
°
C
20
Years
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