參數(shù)資料
型號(hào)： A29L004AX
廠商： AMIC Technology Corporation
英文描述： Replaced by PT78ST106,PT78NR106 : 6Vout 1.5A Wide Input Positive Step-Down ISR 3-SIP MODULE -40 to 85
中文描述： 為512k × 8位CMOS 3.0伏只，引導(dǎo)扇區(qū)閃存
文件頁(yè)數(shù)： 18/39頁(yè)
文件大?。?/td> 370K
代理商： A29L004AX
A29L004 Series
PRELIMINARY (October, 2002, Version 0.0)
18
AMIC Technology, Corp.
I/O
5
: Exceeded Timing Limits
I/O
5
indicates whether the program or erase time has
exceeded a specified internal pulse count limit. Under these
conditions I/O
5
produces a "1." This is a failure condition
that indicates the program or erase cycle was not
successfully completed.
The I/O
5
failure condition may appear if the system tries to
program a "1 "to a location that is previously programmed to
"0." Only an erase operation can change a "0" back to a "1."
Under this condition, the device halts the operation, and
when the operation has exceeded the timing limits, I/O
5
produces a "1."
Under both these conditions, the system must issue the
reset command to return the device to reading array data.
I/O
3
: Sector Erase Timer
After writing a sector erase command sequence, the
system may read I/O
3
to determine whether or not an erase
operation has begun. (The sector erase timer does not
apply to the chip erase command.) If additional sectors are
selected for erasure, the entire time-out also applies after
each additional sector erase command. When the time-out
is complete, I/O
3
switches from "0" to "1." The system may
ignore I/O
3
if the system can guarantee that the time
between additional sector erase commands will always be
less than 50
μ
s. See also the "Sector Erase Command
Sequence" section.
After the sector erase command sequence is written, the
system should read the status on I/O
7
(
Data
Polling) or
I/O
6
(Toggle Bit I) to ensure the device has accepted the
command sequence, and then read I/O
3
. If I/O
3
is "1", the
internally controlled erase cycle has begun; all further
commands (other than Erase Suspend) are ignored until
the erase operation is complete. If I/O
3
is "0", the device will
accept additional sector erase commands. To ensure the
command has been accepted, the system software should
check the status of I/O
3
prior to and following each
subsequent sector erase command. If I/O
3
is high on the
second status check, the last command might not have
been accepted. Table 6 shows the outputs for I/O
3
.
START
Read I/O
7
-I/O
0
Toggle Bit
= Toggle
Program/Erase
Operation Not
Commplete, Write
Reset Command
Yes
Notes :
1. Read toggle bit twice to determine whether or not it is
toggling. See text.
2. Recheck toggle bit because it may stop toggling as I/O
5
changes to "1". See text.
No
Read I/O
7
- I/O
0
Twice
I/O
5
= 1
Toggle Bit
= Toggle
Yes
Yes
Program/Erase
Operation Complete
No
No
Read I/O
7
-I/O
0
(Notes 1,2)
Figure 6. Toggle Bit Algorithm
(Note 1)
相關(guān)PDF資料
PDF描述
A29L004AY Replaced by PT78ST106,PT78NR106 : 6Vout 1.5A Wide Input Positive Step-Down ISR 3-SIP MODULE -40 to 85
A29L004V Replaced by PT78ST106,PT78NR106 : 6Vout 1.5A Wide Input Positive Step-Down ISR 3-SIP MODULE -40 to 85
A29L004W 512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory
A29L004X 512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory
A29L004 512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A29L004AY 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory
A29L004L 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory
A29L004TL-70 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory
A29L004TL-90 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory
A29L004TV-70 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory
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