參數(shù)資料
型號(hào): A29L004AUV-90F
廠商: AMIC Technology Corporation
英文描述: MS3106A16-10PX
中文描述: 為512k × 8位CMOS 3.0伏只,引導(dǎo)扇區(qū)閃存
文件頁數(shù): 5/39頁
文件大小: 528K
代理商: A29L004AUV-90F
A29L004A Series
PRELIMINARY
(March, 2005, Version 0.0)
4
AMIC Technology, Corp.
Absolute Maximum Ratings*
Storage Temperature Plastic Packages . …… .0
°
C to + 70
°
C
Ambient Temperature with Power Applied…… 0
°
C to + 70
°
C
Voltage with Respect to Ground
VCC (Note 1) . . . . . . . . . . . . . . . . . . . …... . . . -0.5V to +4.0V
A9,
OE
&
RESET
(Note 2) . . . . . . . . . . ….. . -0.5 to +12.5V
All other pins (Note 1) . . . . . . . . . . . ….. -0.5V to VCC + 0.5V
Output Short Circuit Current (Note 3) . . . . . . . ….. … 200mA
Notes:
1. Minimum DC voltage on input or I/O pins is -0.5V. During
voltage transitions, input or I/O pins may undershoot VSS
to -2.0V for periods of up to 20ns. Maximum DC voltage
on input and I/O pins is VCC +0.5V. During voltage
transitions, input or I/O pins may
overshoot to VCC +2.0V
for periods up to 20ns.
2. Minimum DC input voltage on A9,
OE
and
RESET
is -
0.5V. During voltage transitions, A9,
OE
and
RESET
may overshoot VSS to -2.0V for periods of up to 20ns.
Maximum DC input voltage on A9 is +12.5V which may
overshoot to 14.0V for periods up to 20ns. (
RESET
is
N/A on 32-pin PLCC & (s)TSOP)
3. No more than one output is shorted at a time. Duration of
the short circuit should not be greater than one second.
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of
this device at these or any other conditions above
those indicated in the operational sections of these
specification is not implied or intended. Exposure to
the absolute maximum rating conditions for extended periods
may affect device reliability.
Operating Ranges
Commercial (C) Devices
Ambient Temperature (T
A
) . . . . . . . ….. . . . . . . 0
°
C to +70
°
C
VCC Supply Voltages
VCC for all devices . . . . . . . . . . . . . . . ….. . . +2.7V to +3.6V
Operating ranges define those limits between which the
functionally of the device is guaranteed.
Device Bus Operations
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register itself does
not occupy any addressable memory location. The register is
composed of latches that store the commands, along with
the address and data information needed to execute the
command. The contents of the register serve as inputs to the
internal state machine. The state machine outputs dictate the
function of the device. The appropriate device bus operations
table lists the inputs and control levels required, and the
resulting output. The following subsections describe each of
these operations in further detail.
Table 1. A29L004A Device Bus Operations
Operation
CE
OE
WE
RESET
(N/A 32-pin PLCC, (s)TSOP)
H
H
VCC
±
0.3 V
H
L
V
ID
A0 – A18
I/O
0
- I/O
7
Read
Write
CMOS Standby
L
L
L
H
X
H
L
X
A
IN
A
IN
X
D
OUT
D
IN
High-Z
VCC
±
0.3 V
L
X
L
Output Disable
Hardware Reset
Sector Protect
(See Note 2)
Sector Unprotect
(See Note 2)
Temporary Sector
Unprotect
H
X
H
H
X
L
X
X
High-Z
High-Z
D
IN
Sector Address,
A6=L, A1=H, A0=L
Sector Address,
A6=H, A1=H, A0=L
A
IN
L
H
L
V
ID
D
IN
X
X
X
V
ID
D
IN
Legend:
L = Logic Low = V
IL
, H = Logic High = V
IH
, V
ID
= 12.0
±
0.5V, X = Don't Care, D
IN
= Data In, D
OUT
= Data Out, A
IN
= Address In
Notes:
1. See the “Sector Protection/Unprotection” section and Temporary Sector Unprotect for more information.
2. This function is not available on 32-pin PLCC & (s)TSOP packages.
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