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參數(shù)資料
| 型號： | A290021UV-120 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | SCR Thyristor; Thyristor Type:Standard Gate; Peak Repetitive Off-State Voltage, Vdrm:600V; On State RMS Current, IT(rms):16A; Peak Non Repetitive Surge Current, Itsm:200A; Gate Trigger Current Max, Igt:25mA RoHS Compliant: Yes |
| 中文描述： | 256K × 8位CMOS 5.0伏只，引導(dǎo)扇區(qū)閃存 |
| 文件頁數(shù)： | 14/32頁 |
| 文件大?。?/td> | 312K |
| 代理商： | A290021UV-120 |
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I/O
3
: Sector Erase Timer
A29002/A290021 Series
(February, 2002, Version 1.0)
14
AMIC Technology, Inc.
After writing a sector erase command sequence, the
system may read I/O
3
to determine whether or not an
erase operation has begun. (The sector erase timer does
not apply to the chip erase command.) If additional
sectors are selected for erasure, the entire time-out also
applies after each additional sector erase command.
When the time-out is complete, I/O
3
switches from "0" to
"1." The system may ignore I/O
3
if the system can
guarantee that the time between additional sector erase
commands will always be less than 50
μ
s. See also the
"Sector Erase Command Sequence" section.
After the sector erase command sequence is written, the
system should read the status on I/O
7
(
Data
Polling) or
I/O
6
(Toggle Bit 1) to ensure the device has accepted the
command sequence, and then read I/O
3
. If I/O
3
is "1", the
internally controlled erase cycle has begun; all further
commands (other than Erase Suspend) are ignored until
the erase operation is complete. If I/O
3
is "0", the device
will accept additional sector erase commands. To ensure
the command has been accepted, the system software
should check the status of I/O
3
prior to and following each
subsequent sector erase command. If I/O
3
is high on the
second status check, the last command might not have
been accepted. Table 6 shows the outputs for I/O
3
.
START
Read I/O
7
-I/O
0
Toggle Bit
= Toggle
Program/Erase
Operation Not
Commplete, Write
Reset Command
Yes
Notes :
1. Read toggle bit twice to determine whether or not it is
toggling. See text.
2. Recheck toggle bit because it may stop toggling as I/O
5
changes to "1". See text.
No
Read I/O
7
- I/O
0
Twice
I/O
5
= 1
Toggle Bit
= Toggle
Yes
Yes
Program/Erase
Operation Complete
No
No
Read I/O
7
-I/O
0
(Notes 1,2)
Figure 5. Toggle Bit Algorithm
(Note 1)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A290021UV-150 | SCR Thyristor; Thyristor Type:Standard Gate; Peak Repetitive Off-State Voltage, Vdrm:800V; On-State RMS Current, IT(rms):16A; Peak Non Repetitive Surge Current, Itsm:200A; Gate Trigger Current Max, Igt:25mA RoHS Compliant: Yes |
| A290021T-55 | 256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| A290021T-70 | 256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| A290021T-90 | 256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| A29002TV-120 | 256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A290021UV-150 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| A290021UV-55 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| A290021UV-70 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| A290021UV-90 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| A29002SERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 8 Bit CMOS 5.0 Volt-only. Boot Sector Flash Memory |
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