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參數(shù)資料
| 型號： | A23L8316V |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 256K X 16 / 512K X 8 BIT CMOS MASK ROM |
| 中文描述： | 256 × 16 /為512k × 8位CMOS掩膜ROM |
| 文件頁數(shù)： | 7/12頁 |
| 文件大小： | 221K |
| 代理商： | A23L8316V |
A23L8316/A23L83161 Series
PRELIMINARY (July, 2004, Version 0.0)
6
AMIC Technology, Corp.
Capacitance
Symbol
Parameter
Min.
Max.
Unit
Test Conditions
Note
C
I
Input Capacitance
10
pF
T
A
= 25
°
C
f = 1.0MHz
3
C
O
Output Capacitance
10
pF
AC Characteristics
(T
A
= 0
°
C to +70
°
C, VCC = 2.7V~3.6V for -100, VCC = 3.0V~3.6V for -70, GND = 0V)
Symbol
Parameter
A23L8316/A23L83161 -70
A23L8316/A23L83161 -
100
Unit
Note
Min.
Max.
Min.
Max.
t
CYC
Cycle Time
70
100
ns
t
AA
Address Access Time
70
100
ns
t
ACE
Chip Enable Access Time
70
100
ns
t
AOE
Output Enable Access Time
35
50
ns
t
OH
Output Hold after Address Change
10
10
ns
t
LZ
Output Low Z Delay
10
10
ns
4, 6
t
HZ
Output High Z Delay*
20
20
ns
5, 6
* t
HZ
is specified from either OE or CEgoing disabled, whichever occurs first.
Notes:
1. OE /CE = V
IH
(Output is unloaded)
2. V
IN
= V
IH
/V
IL,
OE /CE = V
IL
(Output is unloaded)
3. This parameter is periodically sampled and is not 100% tested. All pins, except pins under test, are tied to AC ground.
4. Output LOW impedance delay (t
LZ
) is measured from CE or OE going active.
5. Output HIGH impedance delay (t
HZ
) is measured from CE or OE going inactive.
6. This parameter is sampled and not 100% tested.
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| A23L8316V-70 | 256K X 16 / 512K X 8 BIT CMOS MASK ROM |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| A23L8316V-100 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:256K X 16 / 512K X 8 BIT CMOS MASK ROM |
| A23L8316V-70 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:256K X 16 / 512K X 8 BIT CMOS MASK ROM |
| A23L9308 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:524,288 X 8 BIT CMOS MASK ROM |
| A23L9308-15 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:524,288 X 8 BIT CMOS MASK ROM |
| A23L9308-20 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:524,288 X 8 BIT CMOS MASK ROM |
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