- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4343 > A14100A-BG313C (Microsemi SoC)IC FPGA 10K GATES 313-BGA PDF資料下載
參數(shù)資料
| 型號： | A14100A-BG313C |
| 廠商： | Microsemi SoC |
| 文件頁數(shù)： | 6/90頁 |
| 文件大小： | 0K |
| 描述： | IC FPGA 10K GATES 313-BGA |
| 標準包裝： | 24 |
| 系列： | ACT™ 3 |
| LAB/CLB數(shù)： | 1377 |
| 輸入/輸出數(shù)： | 228 |
| 門數(shù)： | 10000 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 313-BBGA |
| 供應商設備封裝： | 313-PBGA（35x35） |
第1頁第2頁第3頁第4頁第5頁當前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁
Detailed Specifications
2- 6
R e v ision 3
Horizontal Routing
Horizontal channels are located between the rows of modules and are composed of several routing
tracks. The horizontal routing tracks within the channel are divided into one or more segments. The
minimum horizontal segment length is the width of a module-pair, and the maximum horizontal segment
length is the full length of the channel. Any segment that spans more than one-third the row length is
considered a long horizontal segment. A typical channel is shown in Figure 2-7. Undedicated horizontal
routing tracks are used to route signal nets. Dedicated routing tracks are used for the global clock
networks and for power and ground tie-off tracks.
Vertical Routing
Other tracks run vertically through the modules. Vertical tracks are of three types: input, output, and long.
Vertical tracks are also divided into one or more segments. Each segment in an input track is dedicated
to the input of a particular module. Each segment in an output track is dedicated to the output of a
particular module. Long segments are uncommitted and can be assigned during routing. Each output
segment spans four channels (two above and two below), except near the top and bottom of the array
where edge effects occur. LVTs contain either one or two segments. An example of vertical routing tracks
and segments is shown in Figure 2-8.
Figure 2-7
Horizontal Routing Tracks and Segments
Figure 2-8
Vertical Routing Tracks and Segments
HF
Module Row
HCLK
CLK0
NVCC
SIGNAL
(LHT)
SIGNAL
NVSS
CLK1
Track
Segment
|
Module Row
Vertical Input
Segment
S-Module
C-Module
VF
FF
XF
Module Row
Channel
LVTs
S-Module
C-Module
相關PDF資料 |
PDF描述 |
|---|---|
| A14100A-RQ208C | IC FPGA 10K GATES 208-PQFP |
| 93LC56AT-I/SN | IC EEPROM 2KBIT 3MHZ 8SOIC |
| APA1000-BGG456 | IC FPGA PROASIC+ 1M 456-PBGA |
| 24LC04BT/SN | IC EEPROM 4KBIT 400KHZ 8SOIC |
| 24AA01H-I/ST | IC EEPROM 1KBIT 400KHZ 8TSSOP |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A14100A-BG313I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| A14100A-CQ256B | 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 10K GATES 1377 CELLS 100MHZ 0.8UM 5V 256CQFP - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 10K GATES 256-CQFP MIL |
| A14100A-CQ256C | 功能描述:IC FPGA 10K GATES 256-CQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ACT™ 3 標準包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應商設備封裝:352-CQFP（75x75） |
| A14100A-CQ256M | 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 Family 10K Gates 1377 Cells 100MHz 0.8um Technology 5V 256-Pin CQFP 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 10K GATES 1377 CELLS 100MHZ 0.8UM 5V 256CQFP - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 10K GATES 256-CQFP MIL |
| A14100A-PG257B | 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 10K GATES 1377 CELLS 100MHZ 0.8UM 5V 257CPGA - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 10K GATES 257-CPGA MIL |
發(fā)布緊急采購，3分鐘左右您將得到回復。