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參數(shù)資料
| 型號： | A1186LUA-T |
| 廠商： | Allegro Microsystems Inc |
| 文件頁數(shù)： | 8/15頁 |
| 文件大?。?/td> | 509K |
| 描述： | IC SWITCH HALL EFFECT UNI 3-SIP |
| 產(chǎn)品培訓(xùn)模塊： | Current Sensor |
| 標準包裝： | 500 |
| 傳感范圍： | 10G ~ 60G 跳閘 - 可編程，固定釋放 |
| 類型： | 單極開關(guān) |
| 電源電壓： | 3.5 V ~ 24 V |
| 電流 - 電源： | 6.9mA |
| 輸出類型： | 數(shù)字，開路集電極 |
| 特點： | 可編程 |
| 工作溫度： | -40°C ~ 150°C |
| 封裝/外殼： | 3-SIP |
| 供應(yīng)商設(shè)備封裝： | 3-SIP |
| 包裝： | 散裝 |
Ultrasensitive Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switches
A1185 and
A1186
7
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Figure 2. Chopper stabilization circuit (dynamic quadrature offset cancellation)
Amp
Regulator
Clock/Logic
Hall Element
Low-Pass
Filter
Chopper Stabilization Technique
A limiting factor for switchpoint accuracy when using Hall
effect technology is the small signal voltage developed across
the Hall element. This voltage is proportionally small relative to
the offset that can be produced at the output of the Hall element
device. This makes it difficult to process the signal and maintain
an accurate, reliable output over the specified temperature and
voltage range.
Chopper stabilization is a unique approach used to minimize
Hall offset on the chip. The Allegro patented technique, dynamic
quadrature offset cancellation, removes key sources of the output
drift induced by temperature and package stress. This offset
reduction technique is based on a signal modulation-demodula-
tion process. The undesired offset signal is separated from the
magnetically induced signal in the frequency domain through
modulation. The subsequent demodulation acts as a modulation
process for the offset causing the magnetically induced signal to
recover its original spectrum at base band while the DC offset
becomes a high frequency signal. Then, using a low-pass filter,
the signal passes while the modulated DC offset is suppressed.
The chopper stabilization technique uses a 200 kHz high fre-
quency clock. For demodulation process, a sample-and-hold
technique is used, where the sampling is performed at twice
the chopper frequency (400KHz). The sampling demodulation
process produces higher accuracy and faster signal processing
capability. Using this chopper stabilization approach, the chip is
desensitized to the effects of temperature and stress. This tech-
nique produces devices that have an extremely stable quiescent
Hall output voltage, is immune to thermal stress, and has precise
recoverability after temperature cycling. This technique is made
possible through the use of a BiCMOS process which allows the
use of low-offset and low-noise amplifiers in combination with
high-density logic integration and sample-and-hold circuits.
The repeatability of switching with a magnetic field is slightly
affected using a chopper technique. The Allegro high frequency
chopping approach minimizes the affect of jitter and makes it
imperceptible in most applications. Applications that may notice
the degradation are those that require the precise sensing of alter-
nating magnetic fields such as ring magnet speed sensing. For
those applications, Allegro recommends the low jitter family
of digital devices.
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