A1 41 00 A Ti m i ng Cha r act e r i s t i cs (continued) (W or s" />
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    參數資料
    型號: A1020B-1PLG84I
    廠商: Microsemi SoC
    文件頁數: 40/98頁
    文件大?。?/td> 0K
    描述: IC FPGA 2K GATES 84-PLCC IND
    標準包裝: 16
    系列: ACT™ 1
    LAB/CLB數: 547
    輸入/輸出數: 69
    門數: 2000
    電源電壓: 4.5 V ~ 5.5 V
    安裝類型: 表面貼裝
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 84-LCC(J 形引線)
    供應商設備封裝: 84-PLCC(29.31x29.31)
    45
    Hi R e l F P GA s
    A1 41 00 A Ti m i ng Cha r act e r i s t i cs (continued)
    (W or s t - C as e M i l i t a r y Cond i t i o n s , V CC = 4.5 V, TJ = 1 25°C)
    ‘–1’ Speed
    ‘Std’ Speed
    Parameter
    Description
    Min.
    Max.
    Min.
    Max.
    Units
    I/O Module Sequential Timing
    tINH
    Input F-F Data Hold
    (w.r.t. IOCLK Pad)
    0.0
    ns
    tINSU
    Input F-F Data Setup
    (w.r.t. IOCLK Pad)
    2.1
    2.4
    ns
    tIDEH
    Input Data Enable Hold
    (w.r.t. IOCLK Pad)
    0.0
    ns
    tIDESU
    Input Data Enable Setup
    (w.r.t. IOCLK Pad)
    8.7
    10.0
    ns
    tOUTH
    Output F-F Data Hold
    (w.r.t. IOCLK Pad)
    1.2
    ns
    tOUTSU
    Output F-F Data Setup
    (w.r.t. IOCLK Pad)
    1.2
    ns
    tODEH
    Output Data Enable Hold
    (w.r.t. IOCLK Pad)
    0.6
    ns
    tODESU
    Output Data Enable Setup
    (w.r.t. IOCLK Pad)
    2.4
    ns
    TTL Output Module Timing1
    tDHS
    Data to Pad, High Slew
    7.5
    8.9
    ns
    tDLS
    Data to Pad, Low Slew
    11.9
    14.0
    ns
    tENZHS
    Enable to Pad, Z to H/L, High Slew
    6.0
    7.0
    ns
    tENZLS
    Enable to Pad, Z to H/L, Low Slew
    10.9
    12.8
    ns
    tENHSZ
    Enable to Pad, H/L to Z, High Slew
    11.9
    14.0
    ns
    tENLSZ
    Enable to Pad, H/L to Z, Low Slew
    10.9
    12.8
    ns
    tCKHS
    IOCLK Pad to Pad H/L, High Slew
    12.2
    14.0
    ns
    tCKLS
    IOCLK Pad to Pad H/L, Low Slew
    17.8
    ns
    dTLHHS
    Delta Low to High, High Slew
    0.04
    ns/pF
    dTLHLS
    Delta Low to High, Low Slew
    0.07
    0.08
    ns/pF
    dTHLHS
    Delta High to Low, High Slew
    0.05
    0.06
    ns/pF
    dTHLLS
    Delta High to Low, Low Slew
    0.07
    0.08
    ns/pF
    Note:
    1.
    Delays based on 35 pF loading.
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