VCC L1 I/O R11 I/O V18 I/O L2 I/O R13 I/O V19 I/O L3 I/O R16 IOPCL, I/O X1 I/O L4 " />
鍙冩暩璩囨枡
鍨嬭櫉锛� A1020B-1PL68I
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩锛� 70/98闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA 2K GATES 68-PLCC IND
妯欐簴鍖呰锛� 19
绯诲垪锛� ACT™ 1
LAB/CLB鏁革細 547
杓稿叆/杓稿嚭鏁革細 57
闁€鏁革細 2000
闆绘簮闆诲锛� 4.5 V ~ 5.5 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 68-LCC锛圝 褰㈠紩绶氾級
渚涙噳鍟嗚ō鍌欏皝瑁濓細 68-PLCC锛�24.23x24.23锛�
72
K19
I/O
R9
I/O
V17
VCC
L1
I/O
R11
I/O
V18
I/O
L2
I/O
R13
I/O
V19
I/O
L3
I/O
R16
IOPCL, I/O
X1
I/O
L4
CLKA, I/O
R17
I/O
X2
I/O
L5
CLKB, I/O
R18
I/O
X3
I/O
L15
GND
R19
I/O
X4
I/O
L16
I/O
T1
I/O
X5
I/O
L17
I/O
T2
I/O
X6
I/O
L18
I/O
T3
I/O
X7
GND
L19
I/O
T4
GND
X8
I/O
M1
I/O
T5
IOCLK, I/O
X9
I/O
M2
I/O
T6
I/O
X10
I/O
M3
I/O
T7
I/O
X11
I/O
M4
I/O
T8
I/O
X12
I/O
M16
I/O
T9
I/O
X13
I/O
M17
I/O
T10
GND
X14
VCC
M18
I/O
T11
I/O
X15
I/O
M19
I/O
T12
I/O
X16
I/O
N1
I/O
T13
I/O
X17
I/O
N2
I/O
T14
I/O
X18
I/O
N3
I/O
T15
I/O
X19
I/O
N4
I/O
T16
GND
Y1
I/O
N5
I/O
T17
GND
Y2
I/O
N15
I/O
T18
I/O
Y3
I/O
N16
I/O
T19
I/O
Y4
I/O
N17
I/O
V1
I/O
Y5
I/O
N18
I/O
V2
I/O
Y6
I/O
N19
I/O
V3
VCC
Y7
I/O
P1
I/O
V4
I/O
Y8
I/O
P2
I/O
V5
I/O
Y9
I/O
P3
I/O
V6
I/O
Y10
I/O
P4
I/O
V7
VCC
Y11
I/O
P16
I/O
V8
I/O
Y12
I/O
P17
I/O
V9
I/O
Y13
I/O
P18
I/O
V10
VCC
Y14
I/O
P19
I/O
V11
I/O
Y15
I/O
R1
I/O
V12
I/O
Y16
I/O
R2
I/O
V13
I/O
Y17
I/O
R3
I/O
V14
I/O
Y18
I/O
R4
GND
V15
I/O
Y19
I/O
R7
I/O
V16
I/O
257- P i n CP GA (C ont i n u ed)
Pin Number
A14100A
Function
Pin Number
A14100A
Function
Pin Number
A14100A
Function
鐩搁棞PDF璩囨枡
PDF鎻忚堪
978-015-020R121 BACKSHELL DB15 METALIZED PLASTIC
A1020B-1PLG68I IC FPGA 2K GATES 68-PLCC IND
957-009-020R121 BACKSHELL GENDER CHANGER 9-9POS
A1010B-1VQG80I IC FPGA 1200 GATES 80-VQFP IND
CAT93C56LI-G IC EEPROM 2KBIT 1MHZ 8DIP
鐩搁棞浠g悊鍟�/鎶€琛撳弮鏁�
鍙冩暩鎻忚堪
A1020B-1PL84B 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ACT 1 Series FPGAs
A1020B-1PL84C 鍔熻兘鎻忚堪:IC FPGA 2K GATES 84-PLCC COM RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:ACT™ 1 妯欐簴鍖呰:40 绯诲垪:SX-A LAB/CLB鏁�:6036 閭忚集鍏冧欢/鍠厓鏁�:- RAM 浣嶇附瑷�:- 杓稿叆/杓稿嚭鏁�:360 闁€鏁�:108000 闆绘簮闆诲:2.25 V ~ 5.25 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:484-BGA 渚涙噳鍟嗚ō鍌欏皝瑁�:484-FPBGA锛�27X27锛�
A1020B-1PL84I 鍔熻兘鎻忚堪:IC FPGA 2K GATES 84-PLCC IND RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:ACT™ 1 妯欐簴鍖呰:40 绯诲垪:SX-A LAB/CLB鏁�:6036 閭忚集鍏冧欢/鍠厓鏁�:- RAM 浣嶇附瑷�:- 杓稿叆/杓稿嚭鏁�:360 闁€鏁�:108000 闆绘簮闆诲:2.25 V ~ 5.25 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:484-BGA 渚涙噳鍟嗚ō鍌欏皝瑁�:484-FPBGA锛�27X27锛�
A1020B-1PL84M 鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:IC FPGA 2K GATES 84-PLCC MIL 鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:IC FPGA 69 I/O 84PLCC
A1020B-1PLG44C 鍔熻兘鎻忚堪:IC FPGA 2K GATES 44-PLCC COM RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:ACT™ 1 妯欐簴鍖呰:40 绯诲垪:SX-A LAB/CLB鏁�:6036 閭忚集鍏冧欢/鍠厓鏁�:- RAM 浣嶇附瑷�:- 杓稿叆/杓稿嚭鏁�:360 闁€鏁�:108000 闆绘簮闆诲:2.25 V ~ 5.25 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:484-BGA 渚涙噳鍟嗚ō鍌欏皝瑁�:484-FPBGA锛�27X27锛�