參數(shù)資料
型號： 9UMS9001YKLF-T
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時鐘產(chǎn)生/分配
英文描述： 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC14
封裝： ROHS COMPLIANT, PLASTIC, MLF-56
文件頁數(shù)： 3/15頁
文件大?。?/td> 113K
代理商： 9UMS9001YKLF-T
IDTTM/ICSTM PC MAIN CLOCK - CK540
1247A—08/28/08
Advance Information
ICS9UMS9001
PC MAIN CLOCK - CK540
11
Byte 0 FS Readback, SS Enable, STOP Control Register
Bit
Pin
Name
Description
Type
0
1
Default
7
-
FSLC
CPU Freq. Sel. Bit MSB
RW
Latch
6
FSLB
CPU Freq. Sel. Bit LSB
RW
Latch
5
CPU_SS_EN
Spread spectrum enable for CPU/SRC/PCI outputs
RW
SS Disabled
SS Enabled
1
4
LCD_Enable
Turns On LCD PLL
RW
Off
On
1
3
SRC3_STOP
SRC 3 Stop Control
RW
0
2
SRC2_STOP
SRC 2 Stop Control
RW
0
1
SRC1_STOP
SRC 1 Stop Control
RW
0
SRC0_STOP
SRC 0 Stop Control
RW
0
Byte 1 LCD Quick Config and CPU Stop ControlRegister
Bit
Pin
Name
Description
Type
0
1
Default
7
CPU_ITP_STOP
CPU_ITP Stop Control
RW
0
6
CPU1_STOP
CPU1 Stop Control
RW
1
5
CPU0_STOP
CPU0 Stop Control
RW
1
4
LCD_SS_EN
Turns on SS for LCD PLL
RW
Off
On
1
3
LCD_SSC_SEL
Select down or center SSC
RW
Down spread
Center spread
0
2
LCD_CF2
PLL3 Quick Config Bit 2
RW
0
1
LCD_CF1
PLL3 Quick Config Bit 1
RW
0
LCD_CF0
PLL3 Quick Config Bit 0
RW
1
Byte 2 Output Enable and Stop Control Register
Bit
Pin
Name
Description
Type
0
1
Default
7
PCI_F2_STOP
Free running PCI Stop Control
RW
0
6
PCI1_STOP
PCI1 Stop Control
RW
1
5
PCI0_STOP
PCI 0 Stop Control
RW
1
4
REF_OE
Output enable for REF
RW
Output Disabled
Output Enabled
1
3
USB_OE
Output enable for USB
RW
Output Disabled
Output Enabled
1
2
PCIF2_OE
Output enable for PCI2
RW
Output Disabled
Output Enabled
1
PCI1_OE
Output enable for PCI1
RW
Output Disabled
Output Enabled
1
0
PCI0_OE
Output enable for PCI0
RW
Output Disabled
Output Enabled
1
Byte 3 Output Enable Register
Bit
Pin
Name
Description
Type
0
1
Default
7
CPU_ITP_OE
Output enable for CPU_ITP
RW
Output Disabled
Output Enabled
1
6
CPU1_OE
Output enable for CPU1
RW
Output Disabled
Output Enabled
1
5
CPU0_OE
Output enable for CPU0
RW
Output Disabled
Output Enabled
1
4
Reserved
RW
0
3
SRC3_OE
Output enable for SRC4
RW
Output Disabled
Output Enabled
1
2
SRC2_OE
Output enable for SRC4
RW
Output Disabled
Output Enabled
1
SRC1_OE
Output enable for SRC4
RW
Output Disabled
Output Enabled
1
0
SRC0_OE
Output enable for SRC4
RW
Output Disabled
Output Enabled
1
Byte 4 Output Enable and CLKREQ# Control Register
Bit
Pin
Name
Description
Type
0
1
Default
7
DOT96_OE
Output enable for DOT96
RW
Output Disabled
Output Enabled
1
6
LCD100_OE
Output enable for LCD100
RW
Output Disabled
Output Enabled
1
5
Reserved
RW
0
4
Reserved
RW
0
3
SRC3_CR
SRC3 CLKREQ3# Enable
RW
0
2
SRC2_CR
SRC2 CLKREQ2# Enable
RW
0
1
SRC1_CR
SRC1 CLKREQ1# Enable
RW
0
SRC0_CR
SRC0 CLKREQ0# Enable
RW
0
See Frequency Select Table
Not controlled by
CLKREQ#
Controlled by
CLKREQ#
Free Running
Stops with
PCI_STOP#
assertion
See Table 2: LCD Quick Configuration
Free Running
Stops with
CPU_STOP#
assertion
Stops with
PCI_STOP#
Assertion
Free Running
相關(guān)PDF資料
PDF描述
A-3.8912-20 QUARTZ CRYSTAL RESONATOR, 3.8912 MHz
A-70289-0248 30 CONTACT(S), MALE, RIGHT ANGLE TWO PART BOARD CONNECTOR, SOLDER
A-70289-0250 34 CONTACT(S), MALE, RIGHT ANGLE TWO PART BOARD CONNECTOR, SOLDER
A-70289-0252 38 CONTACT(S), MALE, RIGHT ANGLE TWO PART BOARD CONNECTOR, SOLDER
A-70289-0253 40 CONTACT(S), MALE, RIGHT ANGLE TWO PART BOARD CONNECTOR, SOLDER
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參數(shù)描述
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