參數(shù)資料
型號: 9S12KT256DGV1
英文描述: MC9S12KT256 Device User Guide
中文描述: MC9S12KT256設(shè)備用戶指南
文件頁數(shù): 73/126頁
文件大?。?/td> 7307K
代理商: 9S12KT256DGV1
Device User Guide — 9S12KT256DGV1/D V01.09
73
Freescale Semiconductor
4.3 Security
The device will make available a security feature preventing the unauthorized read and write of the
memory contents. This feature allows:
Protection of the contents of FLASH,
Protection of the contents of EEPROM,
Operation in single-chip mode,
Operation from external memory with internal FLASH and EEPROM disabled.
The user must be reminded that part of the security must lie with the user’s code. An extreme example
would be user’s code that dumps the contents of the internal program. This code would defeat the purpose
of security. At the same time the user may also wish to put a back door in the user’s program. An example
of this is the user downloads a key through the SCI which allows access to a programming routine that
updates parameters stored in EEPROM.
4.3.1 Securing the Microcontroller
Once the user has programmed the FLASH and EEPROM (if desired), the part can be secured by
programming the security bits located in the FLASH module. These non-volatile bits will keep the part
secured through resetting the part and through powering down the part.
The security byte resides in a portion of the Flash array.
Check the Flash Block Guide for more details on the security configuration.
Table 4-2 Clock Selection Based on PE7
PE7 = XCLKS
1
0
Description
Loop Controlled Pierce Oscillator selected
Full Swing Pierce Oscillator or external clock selected
Table 4-3 Voltage Regulator VREGEN
VREGEN
Description
1
Internal Voltage Regulator enabled
Internal Voltage Regulator disabled, VDD1,2 and
VDDPLL must be supplied externally with 2.5V
0
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