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參數(shù)資料
| 型號： | 9LPRS525AFLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO56 |
| 封裝： | 0.300 INCH, ROHS COMPLIANT, MO-118, SSOP-56 |
| 文件頁數(shù)： | 14/21頁 |
| 文件大?。?/td> | 200K |
| 代理商： | 9LPRS525AFLFT |
ICS9LPRS525
PC MAIN CLOCK
21
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800-345-7015
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Corporate Headquarters
Integrated Device Technology, Inc.
6024 Silver Creek Valley Road
San Jose, CA 95138
United States
800 345 7015
+408 284 8200 (outside U.S.)
Asia Pacific and Japan
IDT Singapore Pte. Ltd.
1 Kallang Sector #07-01/06
KolamAyer Industrial Park
Singapore 349276
Phone: 65-6-744-3356
Fax: 65-6-744-1764
Europe
IDT Europe Limited
321 Kingston Road
Leatherhead, Surrey
KT22 7TU
England
Phone: 44-1372-363339
Fax: 44-1372-378851
2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, ICS, and the IDT logo are trademarks
of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks
are or may be trademarks or registered trademarks used to identify products or services of their respective owners.
Printed in USA
Revision History
Rev.
Issue Date
Who Description
Page #
0.1
7/21/2008
RDW Initial Release
-
0.2
08/060/08
RDW
1. Updated pinout to remove Vout reference on pin 40
2. Updated VDD_IO pin descriptions to show 1.05V to 3.3V operation
1, 3
0.3
8/8/2008
RDW
1. Fixed Pagination of Pin Descriptions
2. Changed reference to PCI3 Config Table in Pindes to match table name
3. Added Byte 29 for Slew Rate control
2,3,17
0.4
10/10/2008
RDW
1) Byte 11, bit 5 is now reserved.
2) Byte 29, bits 7:6 default to 0.8X slew rate (‘10’)
3) Removed reference to STOP drive mode in Power management table.
4) Corrected REF slew rate control from Byte 29b3 to Byte 29b2.
5) Clarified description of Byte 11, bits 2 and 3 to reflect CK505 ME clock selection table.
6) Marked as Reserved all bits that are not in the 56-pin version of the device
Various
0.5
4/28/2009
RDW
1) updated tables 2, 6 and 7 to clarify interaction of Config Modes with SRC1
2) Updated ordering revision to A
10, 11, 19,
20
A
4/28/2009
RDW Released to final
B
1/21/2010
RDW Updated Power Groups table
4
C
4/20/2010
RDW Updated Abs Max table with Case Temp. parameter
5
D
1/31/2011
RDW Updated cycle to cycle jitter for SRC outputs to 85ps from 125ps.
6
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9LPRS525AGILF | 功能描述:時鐘合成器/抖動清除器 56-PIN CK505 COMPATIBLE RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9LPRS525AGILFT | 功能描述:時鐘合成器/抖動清除器 56-PIN CK505 COMPATIBLE RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9LPRS525AGLF | 功能描述:時鐘合成器/抖動清除器 56-PIN CK505 COMPATIBLE RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9LPRS525AGLFT | 功能描述:時鐘合成器/抖動清除器 56-PIN CK505 COMPATIBLE RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9LPRS535 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:48-pin CK505 for Intel Systems |
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