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參數(shù)資料
| 型號： | 9FG830AGILFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-48 |
| 文件頁數(shù)： | 4/19頁 |
| 文件大?。?/td> | 219K |
| 代理商： | 9FG830AGILFT |
IDT Eight Output Differential Frequency Generator for PCIe Gen3 and QPI
1680C—08/26/10
9FG830
Eight Output Differential Frequency Generator for PCIe Gen3 and QPI
12
General SMBus serial interface information for the 9FG830
How to Write:
Controller (host) sends a start bit.
Controller (host) sends the write address DC
(H)
IDT clock will acknowledge
Controller (host) sends the begining byte location = N
IDT clock will acknowledge
Controller (host) sends the data byte count = X
IDT clock will acknowledge
Controller (host) starts sending Byte N through
Byte N + X -1
(see Note 2)
IDT clock will acknowledge each byte one at a time
Controller (host) sends a Stop bit
How to Read:
Controller (host) will send start bit.
Controller (host) sends the write address DC
(H)
IDT clock will acknowledge
Controller (host) sends the begining byte
location = N
IDT clock will acknowledge
Controller (host) will send a separate start bit.
Controller (host) sends the read address DD
(H)
IDT clock will acknowledge
IDT clock will send the data byte count = X
IDT clock sends Byte N + X -1
IDT clock sends Byte 0 through byte X (if X
(H)
was written to byte 8).
Controller (host) will need to acknowledge each byte
Controllor (host) will send a not acknowledge bit
Controller (host) will send a stop bit
IDT (Sla ve /Re ce ive r)
T
W R
ACK
P
stoP bit
X
B
y
te
Index Block Write Operation
S lave Address DC(H)
B eginning Byte = N
W Rite
starT bit
Controlle r (Host)
Byte N + X - 1
Data Byte Count = X
B eginning Byte N
T
starT bit
W R
W Rite
RT
Repeat starT
RD
ReaD
Beginning B yte N
Byte N + X - 1
N
Not acknowledge
P
stoP bit
S lave Address DD(H)
Index Block Read Operation
S lave Address DC(H)
B eginning Byte = N
ACK
Data Byte Count = X
ACK
IDT (Sla ve /Re ce ive r)
Controlle r (Host)
X
B
y
te
ACK
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 9FG830AGILF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 9FG830AFLFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 9FG830AFLF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 9FG830AGLF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 9FGP202AKLFT | 33.33 MHz, OTHER CLOCK GENERATOR, PQCC40 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9FG830AGLF | 功能描述:時鐘合成器/抖動清除器 PCIE SYNTHESIZER - GEN3, 8 OUTPUT RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9FG830AGLFT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 PCIE SYNTHESIZER - GEN3, 8 OUTPUT RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| 9FG831AFILF | 功能描述:時鐘合成器/抖動清除器 PCIE SYNTHESIZER - GEN3, 8 OUTPUT RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9FG831AFILFT | 功能描述:時鐘合成器/抖動清除器 PCIE SYNTHESIZER - GEN3, 8 OUTPUT RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9FG831AFLF | 功能描述:時鐘合成器/抖動清除器 PCIE SYNTHESIZER - GEN3, 8 OUTPUT RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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