參數(shù)資料
型號(hào): 95V847AGLF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 95V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
封裝: 0.173 INCH, 0.65 MM PITCH, LEAD FREE, MO-153, TSSOP-24
文件頁數(shù): 6/11頁
文件大?。?/td> 145K
代理商: 95V847AGLF
4
ICS95V847
0718D—04/08/05
Recommended Operating Condition (see note1)
TA = 0 - 85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
VDD, AVDD
2.3
2.5
2.7
V
CLKT, CLKC, FB_INC
0.4
VDD/2 - 0.18
V
PD#
-0.3
0.7
V
CLKT, CLKC, FB_INC
VDD/2 + 0.18
2.1
V
PD#
1.7
VDD + 0.6
V
DC input signal voltage
(note 2)
VIN
-0.3
VDD + 0.3
V
DC - CLKT, FB_INT
0.36
VDD + 0.6
V
AC - CLKT, FB_INT
0.7
VDD + 0.6
V
Output differential cross-
voltage (note 4)
VOX
VDD/2 - 0.15
VDD/2 + 0.15
V
Input differential cross-
voltage (note 4)
VIX
VDD/2 - 0.2
VDD/2
VDD/2 + 0.2
V
High level output
current
IOH
-6.4
mA
Low level output current
IOL
5.5
mA
Operating free-air
temperature
TA
085
°C
Differential input signal
voltage (note 3)
VID
Low level input voltage
VIL
High level input voltage
VIH
Notes:
1.
Unused inputs must be held high or low to prevent them from floating.
2.
DC input signal voltage specifies the allowable DC execution of differential input.
3.
Differential inputs signal voltages specifies the differential voltage [VTR-VCP]
required for switching, where VT is the true input level and VCP is the
complementary input level.
4.
Differential cross-point voltage is expected to track variations of VDD and is the
voltage at which the differential signal must be crossing.
相關(guān)PDF資料
PDF描述
95V847AGT 95V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
95V847AGLFT 95V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
95V847AG 95V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
95V847YGLF-T 95V SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO8
95V850AG 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
95V847AGLFT 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 1:5, 2.5V Phase-Lock Loop Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
95V847AGLF-T 制造商:INTEGRATED DEVICE TECHNOLOGY 功能描述:
95V847AGT 制造商:Integrated Device Technology Inc 功能描述:Zero Delay PLL Clock Driver Single 45MHz to 233MHz 24-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:1:5, 2.5V Phase-Lock Loop Clock Driver
95V850AGLF 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
95V850AGLFT 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel