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參數資料
| 型號： | 952703BF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 217.9 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | GREEN, MO-118, SSOP-48 |
| 文件頁數： | 16/19頁 |
| 文件大?。?/td> | 264K |
| 代理商： | 952703BF |
6
Integrated
Circuit
Systems, Inc.
ICS952703
Preliminary Product Preview
0813B—05/17/05
I
2C Table: Frequency Select Register
Bit 7
SS_EN
Spread Enable
RW
1
Bit 6
SEL12_48MHz
Output Select
RW
Latch
Bit 5
SEL24_48MHz
Output Select
RW
Latch
Bit 4
Bit4
Freq Select Bit 4
RW
0
Bit 3
FS3
Freq Select Bit 3
RW
Latch
Bit 2
FS2
Freq Select Bit 2
RW
Latch
Bit 1
FS1
Freq Select Bit 1
RW
Latch
Bit 0
FS0
Freq Select Bit 0
RW
Latch
I
2C Table: Output Control Register
Bit 7
REF0
Output Control
RW
1
Bit 6
REF1
Output Control
RW
1
Bit 5
REF2
Output Control
RW
1
Bit 4
SRCCLKT/C
Output Control
RW
1
Bit 3
PCICLK_F0
Output Control
RW
1
Bit 2
PCICLK_F1
Output Control
RW
1
Bit 1
PCICLK0
Output Control
RW
1
Bit 0
PCICLK1
Output Control
RW
1
I
2
C Table: Output Control Register
Bit 7
PCICLK2
Output Control
RW
1
Bit 6
PCICLK3
Output Control
RW
1
Bit 5
PCICLK4
Output Control
RW
1
Bit 4
PCICLK5
Output Control
RW
1
Bit 3
24_48MHz
Output Control
RW
1
Bit 2
12_48MHz
Output Control
RW
1
Bit 1
AGPCLK1
Output Control
RW
1
Bit 0
AGPCLK0
Output Control
RW
1
I
2C Table: Output Control Register
Bit 7
Reserved
RW
1
Bit 6
Reserved
RW
0
Bit 5
IREF Bit1
RW
1
Bit 4
IREF Bit0
RW
0
Bit 3
Vendor_ID3
RW
0
Bit 2
Vendor_ID2
RW
0
Bit 1
Vendor_ID1
RW
0
Bit 0
Vendor_ID0
RW
1
--
IREF Mulitiplier
Programming Bits
--
00 = 5 x Iref
10 = 6 x Iref
01 = 4 x Iref
11 = 7 x Iref
--
-
Control Function
Type
Name
Type
26
-
PWD
-
Pin #
23
16
17
Byte 2
31
Byte 1
Pin #
-
Name
Type
Byte 0
Pin #
-
Control Function
Name
2
3
4
Name
30
20
21
22
27
43,42
14
15
-
Byte 3
Type
Control Function
01
OFF
48MHz
Enable
48MHz
ON
12MHz
24MHz
01
Enable
Disable
Enable
Disable
Enable
01
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
See Table1: Frequency Selection Table
01
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Vendor ID
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