- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25514 > 951412AFLFT (INTEGRATED DEVICE TECHNOLOGY INC) 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 PDF資料下載
參數(shù)資料
| 型號： | 951412AFLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 0.300 INCH, 0.025 INCH PITCH, GREEN, MO-118, SSOP-56 |
| 文件頁數(shù)： | 20/25頁 |
| 文件大?。?/td> | 246K |
| 代理商： | 951412AFLFT |
4
ICS951412
0883L—04/26/06
General Description
The ICS951412 is a main clock synthesizer chip that provides all clocks required for ATI RS480-based systems.
An SMBus interface allows full control of the device.
Skew Characteristics
Parameter
Description
Test Conditons
Skew
Window
Unit
Tsk_CPU_CPU
measured at x-ing of CPU,
250
ps
Tsk_CPU_PCI
measured at x-ing of CPU,
1.5V of PCI clock
2000
ps
Tsk_PCI_PCI
measured between rising
edge at 1.5V
500
ps
Tsk_PCI33-HT66
measured between rising
edge at 1.5V
500
ps
Tsk_CPU_HT66
measured between rising
edge at 1.5V
2000
ps
Tsk_CPU_HT66
measured at x-ing of CPU,
1.5V of PCI clock
500
ps
Tsk_CPU_CPU
measured at x-ing of CPU,
200
ps
Tsk_CPU_PCI
measured at x-ing of CPU,
1.5V of PCI clock
200
ps
Tsk_PCI_PCI
measured between rising
edge at 1.5V
200
ps
Tsk_PCI33-HT66
measured between rising
edge at 1.5V
200
ps
Tsk_CPU_HT66
measured between rising
edge at 1.5V
200
ps
Tsk_CPU_HT66
measured at x-ing of CPU,
1.5V of PCI clock
200
ps
time independent
skew
not dependent on
V, T changes
time variant skew
varies over
V, T changes
Block Diagram
MAIN PLL
PCICLK0
CONTROL
LOGIC
XTAL
OSC.
CPUCLK8(1:0)
FIXED PLL
USB_48MHz
DIVIDER
DIVIDERS
REF(2:0)
HTTCLK0
SRCCLK(7:3,0)
CLKREQA#
SDATA
SCLK
FS(2:0)
CLKREQB#
SEL75#/100
X1
X2
IREF
ATIGCLK(1:0)
相關PDF資料 |
PDF描述 |
|---|---|
| 951412AGLFT | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 951412BFLF | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 951412AFLF | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 951412AGLF | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 951413CGLF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 951412AGLF | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Synthesizer Dual 56-Pin TSSOP Tube |
| 951412AGLFT | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Synthesizer Dual 56-Pin TSSOP T/R |
| 951412BFLF | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Synthesizer Dual 56-Pin SSOP Tube |
| 951412BFLFT | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Synthesizer Dual 56-Pin SSOP T/R |
| 951412BGLF | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。