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參數(shù)資料
| 型號： | 950810CGLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, MO-153, TSSOP-56 |
| 文件頁數(shù)： | 6/21頁 |
| 文件大?。?/td> | 194K |
| 代理商： | 950810CGLFT |
14
ICS950810
0472E—07/03/02
All 3V66 clocks are to be in pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock, there
is no defined phase relationship between 3V66_1/VCH and other 3V66 clocks. The PCI group should lag 3V66 by the
standard skew described below as Tpci.
3V66 & PCI Phase Relationship
3V66 (1:0)
3V66 (4:2)
3V66_5
PCICLK_F (2:0) PCICLK (6:0)
Tpci
Skews at Common Transition Edges
GROUP
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
PCI
PCI tsk
1
VT = 1.5 V
127
500
ps
3V66
3V66 tsk
1
VT = 1.5 V
67
250
ps
3V66 to PCI
S3V66-PCI
3V66 (5:0) leads 33MHz PCI
1.5
3.5
ns
1Guarenteed by design, not 100% tested in production.
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