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參數(shù)資料
| 型號(hào)： | 950211BFL-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 205 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 0.300 INCH, MO-118, SSOP-56 |
| 文件頁(yè)數(shù)： | 18/23頁(yè) |
| 文件大?。?/td> | 214K |
| 代理商： | 950211BFL-T |
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4
Integrated
Circuit
Systems, Inc.
ICS950211
0465E—05/17/05
General I
2C serial interface information
How to Write:
Controller (host) sends a start bit.
Controller (host) sends the write address D2
(H)
ICS clock will
acknowledge
Controller (host) sends the begining byte location = N
ICS clock will
acknowledge
Controller (host) sends the data byte count = X
ICS clock will
acknowledge
Controller (host) starts sending
Byte N through
Byte N + X -1
(see Note 2)
ICS clock will
acknowledge each byte one at a time
Controller (host) sends a Stop bit
How to Read:
Controller (host) will send start bit.
Controller (host) sends the write address D2
(H)
ICS clock will
acknowledge
Controller (host) sends the begining byte
location = N
ICS clock will
acknowledge
Controller (host) will send a separate start bit.
Controller (host) sends the read address D3
(H)
ICS clock will
acknowledge
ICS clock will send the data byte count = X
ICS clock sends
Byte N + X -1
ICS clock sends
Byte 0 through byte X (if X
(H)
was written to byte 8).
Controller (host) will need to acknowledge each byte
Controllor (host) will send a not acknowledge bit
Controller (host) will send a stop bit
*See notes on the following page.
ICS (Slave/Receiver)
T
WR
ACK
P
stoP bit
X
By
te
Index Block Write Operation
Slave Address D2(H)
Beginning Byte = N
WRite
starT bit
Controller (Host)
Byte N + X - 1
Data Byte Count = X
Beginning Byte N
T
starT bit
WR
WRite
RT
Repeat starT
RD
ReaD
Beginning Byte N
Byte N + X - 1
N
Not acknowledge
PstoP bit
Slave Address D3(H)
Index Block Read Operation
Slave Address D2(H)
Beginning Byte = N
ACK
Data Byte Count = X
ACK
ICS (Slave/Receiver)
Controller (Host)
X
By
te
ACK
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 950211BFLF | 205 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 08053C103KA72A | General Specifications |
| 950211BFLFT | 205 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 950211BFT | 205 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 08053C103KA74A | General Specifications |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 950211BGLF | 制造商:Integrated Device Technology Inc 功能描述:IDT 950211BGLF Phased Locked Loop (PLL) |
| 950-212 | 制造商:Mitutoyo Corporation 功能描述:SPRING DIVIDER; Instrument Type:Spring Divider; Measuring Range Max:6" ;RoHS Compliant: NA |
| 9502-12INX180YDS | 制造商:3M Electronic Products Division 功能描述:70006170149 |
| 950-213 | 制造商:Mitutoyo Corporation 功能描述:SPRING DIVIDER, 8" |
| 950-215 | 制造商:Mitutoyo Corporation 功能描述:SPRING DIVIDER; Instrument Type:Spring Divider; Measuring Range Max:10" ;RoHS Compliant: NA |
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