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參數(shù)資料
| 型號： | 935272702518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | ADC |
| 英文描述： | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP144 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, LEAD FREE, PLASTIC, SOT-486-1, LQFP-144 |
| 文件頁數(shù)： | 14/61頁 |
| 文件大小： | 326K |
| 代理商： | 935272702518 |
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2004 May 18
21
Philips Semiconductors
Product specication
Triple 8-bit video ADC up to 270 Msps
TDA8754
Table 7
Write format bit description
9.1.3
READ REGISTER
Table 8
I2C-bus sequence for reading one register
BIT
SYMBOL
DESCRIPTION
Byte 1
7 to 1
A[6:0]
Device address. The TDA8754 address is 1001 10X. Bit A0 relates with the voltage level
on pin A0.
0R/W
Write command bit. If R/W = 0, then write action.
Byte 2
7 to 6
not used
5
MODE
Mode selection bit. If MODE = 1, then all registers can be written one after the other.
4 to 0
SA[4:0]
Register subaddress. Initial condition is XX11 1111.
Byte (2 + n)
7 to 0
D[7:0]
Data n. This value is written in register 00h + n.
SDA LINE
DESCRIPTION
S
master starts with a start condition
Byte 1
master transmits device address (7 bits) plus write command bit (R/W=0)
A
slave generates an acknowledge
Byte 2
master transmits programming mode and subregister address to read from
A
slave generates an acknowledge
Byte 3
master transmits read register subaddress
A
slave generates an acknowledge
Byte 4
master transmits device address (7 bits) plus read command bit (R/W=1)
A
slave generates an acknowledge
Byte 5
slave transmits data to master
A
master generates an not-acknowledge after reading the data byte
P
master generates a stop condition
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