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參數(shù)資料
| 型號(hào)： | 935271264551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | 4000/14000/40000 SERIES, 10 1-BIT DRIVER, TRUE OUTPUT, PBGA64 |
| 封裝： | 7 X 7 MM, 0.70 MM PITCH, PLASTIC, MO-195, SOT-746-1, TFBGA-64 |
| 文件頁(yè)數(shù)： | 3/10頁(yè) |
| 文件大?。?/td> | 62K |
| 代理商： | 935271264551 |
Philips Semiconductors
Product data
CBTV4010
10-bit DDR SDRAM mux/bus switch
2
2002 Feb 19
853-2315 27756
FEATURES
Enable signal is SSTL_2 compatible
Optimized for use in Double Data Rate (DDR) SDRAM
applications
Designed to be used with 400 Mbps/200 MHz DDR data bus
Switch on resistance is designed to eliminate the need for series
resistor to DDR SDRAM
20 on resistance
Internal 100 pull-down resistors
Low differential skew
Matched rise/fall slew rate
Low cross-talk data-data/data-DQM
Independent DIMM control lines
Latch-up protection exceeds 500 mA per JESD78
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
DESCRIPTION
This 10-bit bus switch is designed for 2.3 V to 2.7 V VCC operation
and SSTL_2 select input levels.
Each Host port pin is multiplexed to one of four DIMM port pins.
When the S pin is low the corresponding 10-bit bus switch is turned
on. The on-state connects the Host port to the DIMM port through a
20
nominal series resistance. When the S pin is high the switch is
open and a high-impedance state exists between the two ports. The
DIMM port is terminated with a 100
resistor to ground when the
S pin is high. The design is intended to have only one DIMM port
active at any time.
The part incorporates a very low cross-talk design. It has a very low
skew between outputs (< 50 ps) and low skew (< 50 ps) for rising
and falling edges. The part has optional performance in DDR data
bus applications.
Each switch has been optimized for connection to 1 or 2-bank
DIMMs.
The low internal RC time constant of the switch (20
× 7 pF) allows
data transfer to be made with minimal propagation delay.
The CBTV4010 is characterized for operation from 0 to +85
°C.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25 °C; GND = 0 V
TYPICAL
UNIT
tPLH
tPHL
Propagation delay
An to Yn
CL = 7 pF; VCC = 2.5 V
140
ps
CIN
Input capacitance – control pins
VI = 0 V or VCC
1.8
pF
CON
Channel on capacitance
Vin = 1.5 V
7
pF
ICCZ
Total supply current
VCC = 2.5 V
500
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DWG NUMBER
TFBGA64 (Thin Fine Pitch BGA)
0 to +85
°C
CBTV4010EE
SOT746-1
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