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參數(shù)資料
| 型號： | 935270674112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8 I/O, PIA-GENERAL PURPOSE, PDSO16 |
| 封裝： | 3.90 MM, PLASTIC, MS-012, SOT-109-1, SO-16 |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 153K |
| 代理商： | 935270674112 |
Philips Semiconductors
Product data
PCA9557
8-bit I2C and SMBus I/0 port with reset
2002 Dec 13
15
AC SPECIFICATIONS
SYMBOL
PARAMETER
STANDARD MODE
I2C BUS
FAST MODE
I2C BUS
UNITS
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
UNITS
fSCL
Operating frequency
0
100
0
400
kHz
tBUF
Bus free time between STOP and START conditions
4.7
—
1.3
—
s
tHD;STA
Hold time after (repeated) START condition
4.0
—
0.6
—
s
tSU;STA
Repeated START condition setup time
4.7
—
0.6
—
s
tSU;STO
Setup time for STOP condition
4.0
—
0.6
—
s
tHD;DAT
Data in hold time
0
—
0
—
ns
tVD;ACK
Valid time for ACK condition2
—
1
—
0.9
s
tVD;DAT
Data out valid time3
—
1
—
0.9
s
tSU;DAT
Data setup time
250
—
100
—
ns
tLOW
Clock LOW period
4.7
—
1.3
—
s
tHIGH
Clock HIGH period
4.0
—
0.6
—
s
tF
Clock/Data fall time
—
300
20 + 0.1 Cb1
300
ns
tR
Clock/Data rise time
—
1000
20 + 0.1 Cb1
300
ns
tSP
Pulse width of spikes that must be suppressed by the
input filters
—
50
—
50
ns
Port Timing
tPV
Output data valid I/O0
—
250
—
250
ns
tPV
Output data valid I/O1 - I/O7
—
200
—
200
ns
tPS
Input data setup time
0
—
0
—
ns
tPH
Input data hold time
200
—
200
—
ns
Reset
tW
Reset pulse width
4
—
4
—
ns
tREC
Reset recovery time
0
—
0
—
ns
tRESET
Time to reset
400
—
400
—
ns
NOTES:
1. Cb = total capacitance of one bus line in pF.
2. tVD;ACK = time for Acknowledgement signal from SCL low to SDA (out) low.
3. tVD;DAT = minimum time for SDA data out to be valid following SCL low.
tSP
tBUF
tHD;STA
P
S
tLOW
tR
tHD;DAT
tF
tHIGH
tSU;DAT
tSU;STA
Sr
tHD;STA
tSU;STO
SDA
SCL
SU00645
Figure 20. Definition of timing on the I2C-bus
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