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參數(shù)資料
| 型號： | 935270485518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 固定正電壓單路輸出LDO穩(wěn)壓器 |
| 英文描述： | 3.3 V FIXED POSITIVE LDO REGULATOR, 0.3 V DROPOUT, PDSO7 |
| 封裝： | SOP-7 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 79K |
| 代理商： | 935270485518 |
Philips Semiconductors
Product data
SA57026
300 mA LDO with ON/OFF control and
independent delayed RESET function
2001 Oct 03
3
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
TEMPERATURE
TYPE NUMBER
NAME
DESCRIPTION
RANGE
SA57026
SOP-7B
small outline 7-pin surface mount (see dimensional drawing)
–40 to +85
°C
NOTE:
The device has two reset threshold options.
XX
Output voltage (Typ.)
Reset threshold (Typ.)
SA57026D
3.3 V
4.20 V
SA57026F
3.3 V
3.90 V
Part number marking
Part number
Marking
SA57026DD
A L U
SA57026FD
A L V
PIN CONFIGURATION
SL01529
1
2
45
7Cd
VOUT
VIN
RESET
GND
SA57026
3
ON/OFF
6
GND
Figure 2. Pin configuration.
PIN DESCRIPTION
PIN
SYMBOL
DESCRIPTION
1
GND
Ground.
2
RESET
RESET signal output pin. The output remains
low while VDET is below the reset voltage
threshold, and for an extnerl set time delay
Cd pin after VDET rises above reset
threshold.
3
ON/OFF
Output voltage on/off control pin. Connect to
VIN if not used.
ON/OFF = LOW: Voltage output (Pin 5) OFF
ON/OFF = HIGH: Voltage output (Pin 5) ON
4
VIN
Voltage supply input pin.
5
VOUT
Regulated voltage output pin.
6
GND
Ground pin and heat sink.
7
Cd
Reset delay time capacitor pin.
RESET pin output delay time can be set by
capacitance connected to the Cd pin.
tPLH = 100000 x C
tPLH: transmission delay time (s).
C: capacitor value (F).
MAXIMUM RATINGS
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VIN
Supply voltage
–0.3
+10
V
IOUT
Output current
0
400
mA
Toper
Operating temperature
–40
+85
°C
Tstg
Storage temperature
–40
+125
°C
PD
Power dissipation (Note 1)
–
800
mW
NOTE:
1. When mounted on a 25
× 40 × 1 mm glass epoxy board.
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