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參數(shù)資料
| 型號： | 935270331112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | 3 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO20 |
| 封裝： | 7.50 MM, PLASTIC, MS-013, SOT-163-1, SO-20 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大小： | 110K |
| 代理商： | 935270331112 |
Philips Semiconductors
Product data
PCA9560
Dual 5-bit multiplexed 1-bit latched I2C EEPROM
2002 May 24
4
DEVICE ADDRESS
Following a START condition the bus master must output the address of the slave it is accessing. The address of the PCA9560 is shown in
Figure 1. To conserve power, no internal pull-up resistors are incorporated on the hardware selectable address pins and they must be pulled
HIGH or LOW.
The last bit of the slave address byte defines the operation to be performed. When set to logic 1 a read is selected while a logic 0 selects a write
operation.
0
1
A1
A0
R/W#
11
SW00955
MSB
LSB
FIXED
PROGRAMMABLE
Figure 1. Slave address
CONTROL REGISTER
Following the successful acknowledgement of the slave address, the bus master will send a byte to the PCA9560, which will be stored in the
control register. This register can be written and read via the I2C bus.
D6
D5
D4
D2
D1
D0
D7
D3
SW00954
Figure 2. Control Register
CONTROL REGISTER DEFINITION
Following the address and acknowledge bit with logic 0 in the read/write bit, the first byte written is the command byte. If the command byte is
reserved and therefore not valid, it will not be acknowledged. Only valid command bytes will be acknowledged.
Table 1. Register Addresses
D7
D6
D5
D4
D3
D2
D1
D0
REGISTER
NAME
TYPE
REGISTER
FUNCTION
0
EEPROM 0
Read/Write
EEPROM byte 0
register
0
1
EEPROM 1
Read/Write
EEPROM byte 1
register
1
MUX_IN
Read
MUX_IN values
register
Table 2. Commands
D7
D6
D5
D4
D3
D2
D1
D0
COMMAND
1
0
MUX_OUT from EEPROM byte 0
1
0
MUX_OUT from EEPROM byte 1
1
X
1
0
MUX_OUT from MUX_IN
1
X
1
MUX_OUT from MUX_SELECT2
NOTE:
1. All other combinations are reserved.
2. MUX_SELECT pins select between MUX_IN and EEPROM to MUX_OUT.
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