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參數(shù)資料
| 型號： | 935270330118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | 3 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO20 |
| 封裝： | 4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20 |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 110K |
| 代理商： | 935270330118 |
Philips Semiconductors
Product data
PCA9560
Dual 5-bit multiplexed 1-bit latched I2C EEPROM
2002 May 24
6
CONVERSION FROM THE PCA9559 TO THE PCA9560
The PCA9560 is a drop in replacement to the PCA9559 with no software modifications. The PCA9559 has only one MUX_SELECT pin to
choose between the MUX_IN values and the single non-volatile register. Since the PCA9560 has two internal non-volatile registers, if Register 1
is left to all 0’s (default condition) then the MUX_SELECT_1 pin can function the same as the PCA9559 OVERIRIDE pin and MUX_SELECT_0
pin can function the same as the PCA9559 MUX_IN pin.
The PCA9560 can read the MUX_IN_X values via I2C that the PACA9559 cannot do. Another difference is that the MUX_SELECT_X control
pins can be overridden by I2C. To replace the PCA9559 with the PCA9560, the function table for the MUX_OUT outputs and the
NON_MUXED_OUT output must stay the same and the MUX_SELECT pin functions should not be overridden by I2C.
EXTERNAL CONTROL SIGNALS
The Write Protect (WP) input is used to control the ability to write the content of the non-volatile registers. If the WP signal is logic 0, the I2C bus
will be able to write the contents of the non-volatile registers. If the WP signal is logic 1, data will not be allowed to be written into the
non-volatile registers. In this case, the slave address and the command code will be acknowledged but the following data bytes will not be
acknowledged and the EEPROM is not updated.
The factory default for the contents of the non-volatile register are all logic 0. These stored values can be read or written using the I2C-bus
(described in the next section).
The WP, MUX_IN*, and MUX_SELECT_n signals have internal pull-up resistors. See the DC and AC Characteristics for hysteresis and signal
spike suppression figures.
Function Table1
WP
MUX_SELECT_0
MUX_SELECT_1
COMMANDS
0
X
Write to the non-volatile registers through I2C bus allowed
1
X
Write to the non-volatile registers through I2C bus not
allowed
X
0
1
MUX_OUT from EEPROM byte 0
X
0
MUX_OUT from EEPROM byte 1
X
1
X
MUX_OUT from MUX_IN inputs
NOTE:
1. This table is valid when not overridden by I2C control register.
POWER-ON RESET
When power is applied to VDD, an internal power-on reset holds the
PCA9560 in a reset state until VDD has reached VPOR. At that point,
the reset condition is released and the PCA9560 registers and
I2C/SMBus state machine will initialize to their default states.
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