參數(shù)資料
型號(hào): 935270070151
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 微控制器/微處理器
英文描述: 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48
文件頁(yè)數(shù): 4/56頁(yè)
文件大?。?/td> 705K
代理商: 935270070151
Philips Semiconductors
SC16C550
Universal Asynchronous Receiver/Transmitter (UART)
with 16-byte FIFO and infrared (IrDA) encoder/decoder
Product data
Rev. 04 — 13 March 2003
12 of 52
9397 750 11206
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
6.3.2
Auto-CTS (see Figure 5)
The transmitter circuitry checks CTS before sending the next data byte. When CTS is
active, it sends the next byte. To stop the transmitter from sending the following byte,
CTS must be released before the middle of the last stop bit that is currently being
sent (see Figure 6). The auto-CTS function reduces interrupts to the host system.
When ow control is enabled, CTS level changes do not trigger host interrupts
because the device automatically controls its own transmitter. Without auto-CTS, the
transmitter sends any data present in the transmit FIFO and a receiver overrun error
may result.
6.3.3
Enabling autoow control and auto-CTS
Autoow control is enabled by setting Enhanced Feature register bits 6 and 7
(autoow enable or AFE) to a ‘1’.
6.3.4
Auto-CTS and auto-RTS functional timing
The receiver FIFO trigger level can be set to 1, 4, 8, or 14 bytes. These are described
(1) When CTS is LOW, the transmitter keeps sending serial data out.
(2) If CTS goes HIGH before the middle of the last stop bit of the current byte, the transmitter nishes sending the current byte,
but is does not send the next byte.
(3) When CTS goes from HIGH to LOW, the transmitter begins sending data again.
Fig 6.
CTS functional timing waveforms.
START
BITS 0-7
START
BITS 0-7
START
BITS 0-7
STOP
TX
CTS
002aaa049
(1) N = RCV FIFO trigger level (1, 4, or 8 bytes).
(2) The two blocks in dashed lines cover the case where an additional byte is sent as described in the preceding auto-RTS
section.
Fig 7.
RTS functional timing waveforms, RCV FIFO trigger level = 1, 4, or 8 bytes.
START
BYTE N
START
BYTE N + 1
START
BYTE
STOP
RX
RTS
IOR
(RD RBR)
N
N+1
12
002aaa050
相關(guān)PDF資料
PDF描述
935270070157 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQFP48
935270075551 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP80
935270063128 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP64
935270075518 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP80
935270074128 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP64
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
935270713557 制造商:NXP Semiconductors 功能描述:SUB ONLY IC CHP
935270792551 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA
935270792557 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA
935270793551 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA
935270793557 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA