參數(shù)資料
型號: 935269817118
廠商: NXP SEMICONDUCTORS
元件分類: 時鐘及定時
英文描述: LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
封裝: 5.30 MM, PLASTIC, MO-150, SOT-341-1, SSOP-28
文件頁數(shù): 11/12頁
文件大?。?/td> 92K
代理商: 935269817118
Philips Semiconductors
Product data
PCK2002M
0–300 MHz I2C 1:10 clock buffer
2001 Jul 19
8
SERIAL CONFIGURATION MAP
The serial bits will be read by the clock buffer in the following order:
Byte 0 – Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 – Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 2 – Bits 7, 6, 5, 4, 3, 2, 1, 0
All unused register bits (Reserved and N/A) should be designed as “Don’t Care”. It is expected that the controller will force all of these bits to a
“0” level.
All register bits labeled “Initialize to 0” must be written to zero during initialization. Failure to do so may result in a higher than normal operating
current. The controller will read back the last written value.
Byte 0:
Output active/inactive register
1 = enable; 0 = disable
BIT
PIN#
NAME
DESCRIPTION
7
Initialize to 0
6
Initialize to 0
5
Initialize to 0
4
Initialize to 0
3
7
BUF_OUT3
Active/Inactive
2
6
BUF_OUT2
Active/Inactive
1
3
BUF_OUT1
Active/Inactive
0
2
BUF_OUT0
Active/Inactive
NOTE:
1. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be configured at power-on and are
not expected to be configured during the normal modes of operation.
Byte 1:
Output active/inactive register
1 = enable; 0 = disable
BIT
PIN#
NAME
DESCRIPTION
7
27
BUF_OUT15
Active/Inactive
6
26
BUF_OUT14
Active/Inactive
5
23
BUF_OUT13
Active/Inactive
4
22
BUF_OUT12
Active/Inactive
3
Initialize to 0
2
Initialize to 0
1
Initialize to 0
0
Initialize to 0
NOTE:
1. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be configured at power-on and are
not expected to be configured during the normal modes of operation.
Byte 2:
Optional register for possible future requirements
BIT
PIN#
NAME
DESCRIPTION
7
18
BUF_OUT17
Active/Inactive
6
11
BUF_OUT16
Active/Inactive
5
(reserved)
4
(reserved)
3
(reserved)
2
(reserved)
1
(reserved)
0
(reserved)
NOTE:
1. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be configured at power-on and are
not expected to be configured during the normal modes of operation.
相關(guān)PDF資料
PDF描述
935269971118 LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
935270024112 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PDIP40
935270019512 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC44
935270019518 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC44
935270020128 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
935269987557 制造商:NXP Semiconductors 功能描述:SUB ONLY TDA9587-1US1-V1.8 SUBBED TO 935269987557
935270713557 制造商:NXP Semiconductors 功能描述:SUB ONLY IC CHP
935270792551 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA
935270792557 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA
935270793551 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA