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參數(shù)資料
| 型號： | 935269731112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, OCTAL 1-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | 4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20 |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 90K |
| 代理商： | 935269731112 |
2002 Feb 26
11
Philips Semiconductors
Product specication
Octal D-type transparent latch; 3-state
74ALVC373
handbook, full pagewidth
MNA695
th
tsu
th
tsu
VM
VI
GND
VI
GND
LE input
Dn input
Fig.10 The data set-up and hold times for Dn input to LE input.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VCC
VM
INPUT
VI
tr =tf
1.65 to 1.95 V
0.5
× VCC VCC
≤ 2.0 ns
2.3 to 2.7 V
0.5
× V
CC
VCC
≤ 2.0 ns
2.7 V
1.5 V
2.7 V
≤ 2.5 ns
3.0 to 3.6 V
1.5 V
2.7 V
≤ 2.5 ns
handbook, full pagewidth
VEXT
VCC
VI
VO
MNA616
D.U.T.
CL
RT
RL
PULSE
GENERATOR
Fig.11 Load circuitry for switching times.
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VCC
VI
CL
RL
VEXT
tPLH/tPHL
tPZH/tPHZ
tPZL/tPLZ
1.65 to 1.95 V
VCC
30 pF
1 k
open
GND
2
× VCC
2.3 to 2.7 V
VCC
30 pF
500
open
GND
2
× VCC
2.7 V
50 pF
500
open
GND
6 V
3.0 to 3.6 V
2.7 V
50 pF
500
open
GND
6 V
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| 935269733112 | ALVC/VCX/A SERIES, OCTAL 1-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 935269733118 | ALVC/VCX/A SERIES, OCTAL 1-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 935269734118 | ALVC/VCX/A SERIES, OCTAL 1-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 935269734112 | ALVC/VCX/A SERIES, OCTAL 1-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 935269735112 | ALVC/VCX/A SERIES, OCTAL 1-BIT DRIVER, TRUE OUTPUT, PDSO20 |
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