參數(shù)資料
型號(hào): 935269716112
廠商: NXP SEMICONDUCTORS
元件分類: 門電路
英文描述: ALVC/VCX/A SERIES, QUAD 2-INPUT AND GATE, PDSO14
封裝: 3.90 MM, PLASTIC, MS-012, SOT-108-1, SO-14
文件頁(yè)數(shù): 12/16頁(yè)
文件大小: 79K
代理商: 935269716112
2003 Feb 04
5
Philips Semiconductors
Product specication
Quad 2-input AND gate
74ALVC08
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
1.65
3.6
V
VI
input voltage
0
3.6
V
VO
output voltage
VCC = 1.65 to 3.6 V
0
VCC
V
VCC = 0 V; Power-down mode
0
3.6
V
Tamb
operating ambient temperature
40
+85
°C
tr,tf
input rise and fall times
VCC = 1.65 to 2.7 V
0
20
ns/V
VCC = 2.7 to 3.6 V
0
10
ns/V
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
0.5
+4.6
V
IIK
input diode current
VI <0
50
mA
VI
input voltage
0.5
+4.6
V
IOK
output diode current
VO >VCC or VO <0
±50
mA
VO
output voltage
notes 1 and 2
0.5
VCC + 0.5
V
Power-down mode; note 2
0.5
+4.6
V
IO
output source or sink current
VO =0toVCC
±50
mA
ICC, IGND
VCC or GND current
±100
mA
Tstg
storage temperature
65
+150
°C
Ptot
power dissipation
SO package
above 70
°C derate linearly with
8 mW/K
500
mW
TSSOP package
above 60
°C derate linearly with
5.5 mW/K
500
mW
相關(guān)PDF資料
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935269717112 ALVC/VCX/A SERIES, QUAD 2-INPUT AND GATE, PDSO14
935269716118 ALVC/VCX/A SERIES, QUAD 2-INPUT AND GATE, PDSO14
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935269718118 ALVC/VCX/A SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14
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