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參數(shù)資料
| 型號： | 935268831118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 鎖存器 |
| 英文描述： | POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO64 |
| 封裝： | 6.10 MM, PLASTIC, MO-153, SOT-646-1, TSSOP-64 |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 108K |
| 代理商： | 935268831118 |
Philips Semiconductors
Product data
SSTV16859
2.5 V 13-bit to 26-bit SSTL_2
registered buffer for stacked DDR DIMM
2002 Feb 19
9
OUTPUT BUFFER CHARACTERISTICS
The following table describes output-buffer Voltage vs. Current (V/I) characteristics that are sufficient to meet the requirements of registered
DDR DIMM performance and timings. These characteristics are not necessarily production tested but can be guaranteed by design or
characterization. Compliance with these curves is not mandatory if it can be adequately demonstrated that alternate characteristics meet the
requirements of the registered DDR DIMM application.
VOLTAGE (V)
PULL-DOWN
PULL-UP
I (mA) MIN
I (mA) MAX
I (mA) MIN
I (mA) MAX
0.0
0
0.1
7
11
7
10
0.2
14
23
14
20
0.3
21
34
21
30
0.4
28
44
27
40
0.5
33
54
33
49
0.6
39
64
38
59
0.7
44
74
44
68
0.8
48
83
49
76
0.9
52
91
53
84
1.0
56
99
57
93
1.1
59
107
61
100
1.2
61
114
64
108
1.3
63
121
67
115
1.4
64
127
69
121
1.5
66
133
70
128
1.6
66
138
72
134
1.7
67
142
73
139
1.8
67
146
74
144
1.9
67
149
74
148
2.0
67
151
75
152
2.1
68
153
75
156
2.2
68
154
75
159
2.3
68
155
76
161
2.4
—
156
—
163
2.5
—
157
—
165
2.6
—
157
—
167
2.7
—
157
—
168
PARAMETER MEASUREMENT INFORMATION
TEST CIRCUIT
Test Point
From Output
CL = 30 pF
see Note 1
RL = 50
SW00751
Under Test
Figure 1. Load circuitry
NOTE:
1. CL includes probe and jig capacitance.
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