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參數(shù)資料
| 型號(hào)： | 935267061118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | CBT/FST/QS/5C/B SERIES, 16 1 LINE TO 2 LINE MULTIPLEXER AND DEMUX/DECODER, TRUE OUTPUT, PDSO56 |
| 封裝： | 6.10 MM, PLASTIC, MO-153EE, SOT-364-1, TSSOP2-56 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大小： | 132K |
| 代理商： | 935267061118 |
Philips Semiconductors - PIP - CBT6832D; 16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion
topFeatures
q
5 Ohm typical ron
q
Pull-up on B port
q
Undershoot protection on A port only: -2.0 V
q
Near zero propagation delay
q
Controlled enable rate
q
VCC operating range: +4.5 V to +5.5 V
q
> 100 MHz bandwidth (or clock rate) at 20 pF load capacitance
q
56-pin TSSOP package
q
Bias voltage pre-charges the B output when the channel is disabled
q
Latch-up protection exceeds 100 mA per JESD78
q
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
topApplications
q
Provides PCI-X hot-plugging
topDatasheet
Page
count
File
size
(kB)
Datasheet
CBT6832D
16-bit controlled enable rate 1-of-2
multiplexer/demultiplexer with
precharged outputs and charge pump
undershoot protection for live insertion
9/1/2000
Product
specification
8
67
topBlockdiagram(s)
Block diagram of
CBT6832DDGG
file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/CBT6832DDGG.html (2 of 4) [May-13-2003 11:02:15 AM]
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| 935267062118 | CBT/FST/QS/5C/B SERIES, 16 1 LINE TO 2 LINE MULTIPLEXER AND DEMUX/DECODER, TRUE OUTPUT, PDSO56 |
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