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參數(shù)資料
| 型號(hào)： | 935263435112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | CBT/FST/QS/5C/B SERIES, 20 1-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | PLASTIC, SOT-362, TSSOP-48 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 78K |
| 代理商： | 935263435112 |
Philips Semiconductors
Product specification
CBT6820
20-bit bus switch with precharged outputs and
Schottky undershoot protection for live insertion
2
2000 Jun 19
853–2152 23904
FEATURES
TTL compatible inputs and outputs
5 switch connection between two port A and port B
Thin shrink small outline (TSSOP)
Undershoot protection included to prevent shoot through level
changes
Bias voltage pre-charges the outputs to minimize signal distortion
during live insertion
Latch-up protection exceeds 500 mA per JESD78
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
DESCRIPTION
The CBT6820 provides twenty bits of high-speed TTL-compatible bus
switching. The low on-state resistance of the switch allows
bi-directional connections to be made while adding near-zero
propagation delay. The device also precharges the B port to a
user-selectable bias voltage (BIASV) to minimize live-insertion noise.
The device is organized as two 10-bit switch with individual enable
(OE) input. When OE is low, the switch is on and port A is
connected to port B. When OE is high, the switch between port A
and port B is open and the B port is precharged to BIASV through
the equivalent of a 10 k
resistor.
Special clamp circuitry and Schottky diode clamps to ground are
used to prevent an under voltage on the A side (Vin
< GND) from
causing the B side precharge voltage to drop below the ‘‘1” state.
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
21
22
23
24
41
42
43
44
45
46
47
48
SA00520
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1A8
1A9
1A10
2A1
2A2
VCC
2A3
GND
2A4
2A5
2A6
2A7
2A8
2A9
2A10
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
2B1
2B2
2B3
GND
2B4
2B5
2B6
2B7
2B8
2B9
2B10
BIASV
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C; GND = 0V
TYPICAL
UNIT
tPLH/tPHL
Propagation delay
An to Bn or Bn to An
CL = 50 pF, VCC = 5 V
0.25
ns
CIN
Input capacitance
4.5
pF
CI/O
Input/output capacitance
Outputs disabled; VO = 0 V or VCC
9.5
pF
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DWG NUMBER
48-Pin Plastic TSSOP Type II
–40
°C to +85°C
CBT6820 DGG
SOT362–1
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