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參數(shù)資料
| 型號： | 935262696118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PDSO16 |
| 封裝： | PLASTIC, SOT-109, SO-16 |
| 文件頁數(shù)： | 4/31頁 |
| 文件大小： | 224K |
| 代理商： | 935262696118 |
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1999 Nov 03
12
Philips Semiconductors
Product specication
SDH/SONET STM4/OC12 and
1.25 Gbits/s Gigabit Ethernet postampliers
TZA3044; TZA3044B
Notes
1. PECL outputs (pins DOUT, DOUTQ, ST and STQ) are not connected.
2. Maximum currents are specified at Tj = 125 °C, VCC = 5.5 V and worst case processing.
3. 2 mV (p-p) single-ended is the minimum input signal to achieve full clipping of the output signal. Typical an input
signal of 0.8 mV (p-p) single-ended results in a Bit Error Rate (BER) of less than 1010.
4. If the input is DC coupled, the preceding amplifier’s output offset voltage should not exceed these limits, in order to
avoid malfunctioning of the DC offset compensation circuit.
5. Specifications guaranteed by design and characterisation. Each device is tested at full operating speed to guarantee
RF functionality.
6.
7. The reference current can be set by connecting a resistor between VCCA and pin RSET. The corresponding input
signal level detect range is from 2 to 12 mV (p-p) single-ended. See Section “Input signal level detection” for detailed
information.
8. RL =50 connected to a level of VCC 2 V (see Fig.9).
9. Large signal response of TZA3044T and TZA3044TT show very little deviation, although the small signal frequency
response of the TZA3044TT is more flat and shows a larger bandwidth.
10. Internal pull-down resistor of 500 k
to DGND.
11. Internal series resistor of 1 k
.
PECL output pins ST and STQ (TZA3044)
VOL
LOW-level output voltage
note 8
VCC 1.84
VCC 1.6
V
VOH
HIGH-level output voltage
note 8
VCC 1.1
VCC 0.9
V
CL
load capacitance
RL = ∞
20
pF
RL =1k
100
pF
RL =50
1000
pF
TTL output pins ST and STQ (TZA3044B)
VOL
LOW-level output voltage
IOL = 4 mA
0.4
V
VOH
HIGH-level output voltage
IOH = 400 A
2.4
V
PECL input pin JAM (TZA3044)
VIL
LOW-level input voltage
VCC 1.49
V
VIH
HIGH-level input voltage
VCC 1.165
V
II(JAM)
JAM input current
note 10
20
+20
A
TTL input pin JAM (TZA3044B)
VIL
LOW-level input voltage
0.8
V
VIH
HIGH-level input voltage
2.0
V
II(JAM)
JAM input current
note 10
20
+20
A
Reference voltage output pin Vref
Vref
reference voltage
note 11
1.165
1.20
1.235
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Input RMS noise
total output RMS noise
low frequency gain
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