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參數資料
| 型號： | 935262449112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 時鐘及定時 |
| 英文描述： | LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 5.30 MM, PLASTIC, MO-150AH, SOT-341-1, SSOP-28 |
| 文件頁數： | 3/12頁 |
| 文件大?。?/td> | 91K |
| 代理商： | 935262449112 |
Philips Semiconductors
Product specification
PCK2001M
14.318–150 MHz I2C 1:10 clock buffer
2000 May 17
11
AC WAVEFORMS
VM = 1.5 V
VX = VOL + 0.3 V
VY = VOH –0.3 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
BUF_IN
INPUT
VM
tPLH
tPHL
BUF_OUT
VM
SW00246
VDD
Figure 1. Load circuitry for switching times.
tPLZ
tPZL
VI
nOE INPUT
GND
VDD
OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
VOH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
VSS
outputs
enabled
outputs
enabled
outputs
disabled
tPHZ
VM
tPZH
VX
VY
SW00245
VDD
Figure 2. 3-State enable and disable times
DUTY CYCLE
TSDKP
TSDKH
TSDRISE
TSDFALL
TSDKL
2.4
1.5
0.4
SW00247
Figure 3. SDRAM Output clock
DUTY CYCLE
tkp
tkh
tr
tf
tkl
2.4
1.5
0.4
SW00479
Figure 4. Buffer Output clock
TEST CIRCUIT
PULSE
GENERATOR
RT
VI
D.U.T.
VO
CL
VDD
TEST
S1
tPLH/tPHL
Open
tPLZ/tPZL
2
<VDD
tPHZ/tPZH
VSS
Open
VSS
S1
2
<VDD
500
500
SW00251
Figure 5. Load circuitry for switching times
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