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參數(shù)資料
| 型號： | 935262233112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16 I/O, PIA-GENERAL PURPOSE, PDSO24 |
| 封裝： | 5.30 MM, PLASTIC, SSOP-24 |
| 文件頁數(shù)： | 6/26頁 |
| 文件大?。?/td> | 140K |
| 代理商： | 935262233112 |
1999 Apr 07
14
Philips Semiconductors
Product specication
Remote 16-bit I/O expander for I2C-bus
PCF8575
Notes
1. The power-on reset circuit resets the I2C-bus logic with VDD <VPOR and sets all I/Os to logic 1 (with current source
to VDD).
2. The value is not tested, but verified on sampling basis.
3. A single LOW-level output current (IOL) must not exceed 20 mA for an extended time. The sum of all IOLs at any point
in time must not exceed 100 mA.
IL2
leakage current on all other signal
pins
VI =VDD or VSS
10
+10
A
Input SCL; input/output SDA
IOL
LOW-level output current
VOL = 0.4 V; note 3
3
mA
CI
input capacitance
VI =VSS; note 2
7pF
I/Os; P00 to P07 and P10 to P17
IOL
LOW-level output current
VOL = 1 V; note 3
10
25
mA
IOH
HIGH-level output current
VOH =VSS
30
300
A
IOHt
transient pull-up current
VOH =VSS; see Fig.9
0.5
1.0
mA
CI
input capacitance
note 2
10
pF
CO
output capacitance
note 2
10
pF
Port timing; CL ≤ 100 pF (see Figs 9 and 10)
tpv
output data valid
4
s
tsu
input data set-up time
0
s
th
input data hold time
4
s
Interrupt INT (see Fig.13)
IOL
LOW-level output current
VOL = 0.4 V
1.6
mA
TIMING;CL ≤ 100 pF (see Figs 9 and 10)
tiv
input data valid time
4
s
tir
reset delay time
4
s
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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