
1999 Sep 28
2
Philips Semiconductors
Product specication
Octal buffer/line driver; 3-state
74AHC244; 74AHCT244
FEATURES
ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V
MM EIA/JESD22-A115-A
exceeds 200 V
CDM EIA/JESD22-C101
exceeds 1000 V
Balanced propagation delays
All inputs have a Schmitt-trigger
action
Inputs accepts voltages higher than
VCC
For AHC only:
operates with CMOS input levels
For AHCT only:
operates with TTL input levels
Specified from
40 to +85 and +125 °C.
DESCRIPTION
The 74AHC/AHCT244 is a
high-speed Si-gate CMOS device.
The 74AHC/AHCT244 is an octal
non-inverting buffer/line driver with
3-state outputs.
The 3-state outputs are controlled by
the outputs enable inputs 1OE and
2OE.
A HIGH on nOE causes the outputs to
assume a high-impedance OFF state.
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF state.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf ≤ 3.0 ns.
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
∑ (CL × VCC2 × fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC.
INPUTS
OUTPUT
nOE
nAn
nYn
LLL
LH
H
HX
Z
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
AHC
AHCT
tPHL/tPLH
propagation delay
1An to 1Yn;
2An to 2Yn
CL =15pF;
VCC =5V
3.5
5.0
ns
CI
input capacitance
VI =VCC or GND
3.5
pF
CO
output capacitance
4.0
pF
CPD
power dissipation
capacitance
CL =50pF;
f = 1 MHz;
notes 1 and 2
10
12
pF