參數(shù)資料
型號: 935261616112
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PDIP32
封裝: 0.400 INCH, PLASTIC, SDIP-32
文件頁數(shù): 7/48頁
文件大?。?/td> 356K
代理商: 935261616112
1998 Oct 06
15
Philips Semiconductors
Preliminary specication
Universal Serial Bus (USB)
Digital-to-Analog Converter (DAC)
UDA1321
TREBLE CONTROL
The treble control is available for the master channel of the UDA1321. Treble can be regulated in three modes: minimum,
flat and maximum mode. The preferred mode is selected at start-up of the device (configuration map). The corner
frequency is 3000 Hz for the minimum mode and 1500 Hz for the maximum mode. The treble range is from 0 to 6 dB in
steps of 2 dB. It should be noted that the negative treble values as defined in the
“USB Device Class Definition for Audio
Devices” are not supported by the UDA1321; the 0 dB value is returned as 0 dB. Table 4 gives the mapping of the
bTreble value upon the actual treble setting of the USB DAC.
Table 4
Treble control characteristics; note 1
Note
1. The 2 dB step is not supported in the UDA1321/N101; see Chapter “USB-DAC UDA1321/N101
(Firmware sw 2.1.1.7)”.
bTREBLE
TREBLE USB
SIDE (dB)
TREBLE USB DAC (dB)
B7
B6
B5
B4
B3
B2
B1
B0
minimum
at
maximum
0
0.00
0
1
0.25
0
1
0
0.50
0
1
0.75
0
1
0
1.00
0
1
0
1
1.25
2
0
2
0
1
0
1.50
0
1
1.75
0
1
0
2.00
0
1
0
1
2.25
0
1
0
1
0
2.50
0
1
0
1
2.75
0
1
0
3.00
0
1
0
1
3.25
4
0
4
...
0
1
0
1
0
1
5.25
6
0
6
...
0
1
0
1
7.25
6
0
6
...
0
1
0
1
0
1
9.25
6
0
6
...
0
1
31.75
6
0
6
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