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參數(shù)資料
| 型號： | 935261234518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO28 |
| 封裝： | PLASTIC, SOT-341, SSOP-28 |
| 文件頁數(shù)： | 9/44頁 |
| 文件大?。?/td> | 241K |
| 代理商： | 935261234518 |
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2000 Jan 24
17
Philips Semiconductors
Product specication
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
CE/AS INPUT (CHIP ENABLE/ADDRESS SELECTION)
VCE/ASL
LOW-level input voltage
0
1.5
V
VCE/ASH
HIGH-level input voltage
3
5.5
V
ICE/ASH
HIGH-level input current
VCE/AS = 5.5 V
10
A
ICE/ASL
LOW-level input current
VCE/AS =0V
10
A
CL AND DA INPUTS
VCL/DAL
LOW-level input voltage
0
1.5
V
VCL/DAH
HIGH-level input voltage
3
5.5
V
ICL/DAH
HIGH-level input current
VBUS = 5.5 V; VCC =0V
10
A
VBUS = 5.5 V; VCC = 5.5 V
10
A
ICL/DAL
LOW-level input current
VBUS = 1.5 V; VCC =0V
10
A
VBUS =0V; VCC = 5.5 V
10
A
DA OUTPUT (I2C-BUS MODE)
IDAH
leakage current
VDA = 5.5 V
10
A
VDA
output voltage
IDA = 3 mA (sink current)
0.4
V
CLOCK FREQUENCY
fclk
clock frequency
100
150
kHz
CHARGE PUMP OUTPUT CP
ICPH
HIGH-level input current
(absolute value)
CP = 1
280
A
ICPL
LOW-level input current
(absolute value)
CP = 0
60
A
VCP
output voltage
PLL is locked; Tamb =25 °C
1.95
V
ICPleak
off-state leakage current
T2 = 0; T1 = 1
15
0.5
+15
nA
TUNING VOLTAGE OUTPUT VT
IVTOFF
leakage current when
switched off
OS = 1; tuning supply = 33 V
10
A
VVT
output voltage when the loop
is closed
OS = 0; T2 = 0; T1 = 0; T0 = 1;
RLOAD =22k; tuning supply = 33 V
0.2
32.7
V
3-WIRE BUS TIMING
tHIGH
clock HIGH time
see Fig.7
2
s
tSU;DA
data set-up time
see Fig.7
2
s
tHD;DA
data hold time
see Fig.7
2
s
tSU;ENCL
enable to clock set-up time
see Fig.7
10
s
tHD;ENDA
enable to data hold time
see Fig.7
2
s
tEN
enable time between two
transmissions
see Fig.8
10
s
tHD;ENCL
enable to clock active edge
hold time
see Fig.8
6
s
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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