
After carrier recovery, half Nyquist filtering and symbol timing recovery, adaptive equalization is performed based on the use of the ATSC
field sync (trained equalization) and/or the 8-VSB data itself (blind equalization). The adaptive equalizer uses a DFE structure.
After trellis decoding, the stream is de-interleaved with a convolutional de-interleaver (interleaving depth 52). The memory for de-
interleaving is on-chip. The Reed Solomon decoder is ATSC-compliant with a length of 207 and can correct up to 10 bytes. The decoded
stream is de-randomized using a Pseudo Random Bit Sequence (PRBS). Finally the data is passed to a First-In, First-Out (FIFO) register
that prevents the appearance of irregular gaps in the output data.
The output of the TDA8960 is an ATSC-compliant MPEG-2 packet stream together with a clock. Furthermore some signal flags are
provided to indicate the sync bytes and the valid data bytes. Uncorrected blocks are also indicated.
The 8-bit wide MPEG-2 stream can be applied to an MPEG-2 transport demultiplexer.
General features
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One-chip Advanced Television Systems Committee (ATSC)-compliant demodulator and concatenated trellis (Viterbi)/Reed Solomon
decoder with de-interleaver and de-randomizer
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0.4 m process
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3.3 V device
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64-lead QFP64 package
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Boundary scan test
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Output format: 8-bit wide bus.
8-VSB demodulator
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On-chip digital circuitry for tuner Automatic Gain Control (AGC)
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Square root raised cosine filter with 11.5% roll-off factor
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Fully internal carrier recovery loop
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Mostly internal clock recovery and AGC loops with programmable loop filters
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External indication of demodulator lock.
Adaptive equalizer
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Feed forward including a Decision Feedback Equalizer (DFE) structure:
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Range of -2.3 to +10.5 &#s
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Adaptation based on ATSC field sync (trained) and/or 8-VSB data (blind)
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Trellis (Viterbi) decoder
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Rate 2/3 (Rate 1/2 Ungerboeck code based).
Reed Solomon decoder
Features