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參數(shù)資料
| 型號： | 935260938557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, SOT-205, QFP-44 |
| 文件頁數(shù)： | 25/26頁 |
| 文件大?。?/td> | 197K |
| 代理商： | 935260938557 |
1998 Feb 05
8
Philips Semiconductors
Objective specication
Multimedia video data acquisition circuit
SAA5284
8.9
Host interface
The SAA5284 has a multi-standard 8-bit I/O interface.
To reduce the amount of host I/O space used, the parallel
interface has only 3 address inputs (A0, A1 and A2).
An extended addressing (pointer) scheme and the data
FIFO are used to allow access to the full set of SAA5284
registers and the full span of the packet buffer.
As well as the 8 data I/O lines and 3 address lines, there
are the following control signals: RD (read LOW), WR
(write LOW), CS0 (chip select LOW), CS1(second chip
select LOW), INT (interrupt request), DMARQ (DMA
request), DMACK (DMA acknowledge) and RDY (ready).
In order to maintain compatibility with Motorola and Intel
type buses, two control signals SEL0 and SEL1 are
provided to configure the host interface. These signals
allow configuration of the host interface to work with the
Motorola or Intel style interfaces.
The host interface has a digital video mode. Digital video
mode may be used to allow the SAA5284 to pass decoded
VBI data into a system using the digital video bus.
8.10
Interrupt support
The host interface provides comprehensive support for
interrupt generation. The interrupt may be programmed to
occur when a particular number of packets of VBI data are
available in the cache RAM. The interrupts can be further
controlled to occur on a specific line in the TV frame.
The interrupts can also be self masking if required.
8.11
DMA support
Burst and demand mode DMA are supported. In burst
mode, the number of packets to transfer can be defined.
An interrupt can be generated when DMA is finished. This
can be self masking.
8.12
I2C-bus interface
The I2C-bus interface functions as a slave receiver or
transmitter at up to 400 kHz. The I2C-bus address is
selectable as 20H or 22H. All functionality is available
using the I2C-bus although with a slower data transfer
speed. It is possible to use the I2C-bus in all modes.
9
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
10 QUALITY & RELIABILITY
In accordance with
“SNW-FQ-611-E”.
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VDD
supply voltage (all supplies)
0.3
+6.5
V
VI(max)
input voltage (any input)
0.3
VDD + 0.5
V
VO(max)
output voltage (any output)
0.3
VDD + 0.5
V
DDD
DDADDX supply voltage difference between VDDD, VDDA and VDDX
0.25
V
IIOK
DC input or output diode current
20
mA
IO(max)
output current (any output)
10
mA
Tstg
storage temperature
55
+125
°C
Tamb
operating ambient temperature
20
+70
°C
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