參數(shù)資料
型號： 935256670557
廠商： NXP SEMICONDUCTORS
元件分類： 數(shù)字信號處理
英文描述： 0-BIT, 28.6 MHz, OTHER DSP, PQFP80
封裝： 12 X 12 X 1.40 MM, PLASTIC, LQFP-80
文件頁數(shù)： 35/39頁
文件大?。?/td> 314K
代理商： 935256670557
1997 Jun 13
5
Philips Semiconductors
Preliminary specication
Digital Signal Processor (DSP) for
cameras
SAA8110G
PINNING
SYMBOL
PIN
I/O
DESCRIPTION
VDDD(C1)
1
I
digital supply 1 for digital core and CLK1 related peripherals
CLK1
2
I
system- or pixel clock
VSYNCIN
3
I
vertical synchronization input
HSYNCIN
4
I
horizontal synchronization input
FIIN
5
I
eld identication signal input
VSSD(C1)
6
I
digital ground 1 for digital core and CLK1 related peripherals
CCD9
7
I
(preprocessed) AD-converted CDD-signal bit 9 (MSB)
CCD8
8
I
(preprocessed) AD-converted CDD-signal bit 8
CCD7
9
I
(preprocessed) AD-converted CDD-signal bit 7
CCD6
10
I
(preprocessed) AD-converted CDD-signal bit 6
CCD5
11
I
(preprocessed) AD-converted CDD-signal bit 5
CCD4
12
I
(preprocessed) AD-converted CDD-signal bit 4
CCD3
13
I
(preprocessed) AD-converted CDD-signal bit 3
CCD2
14
I
(preprocessed) AD-converted CDD-signal bit 2
CCD1
15
I
(preprocessed) AD-converted CDD-signal bit 1
CCD0
16
I
(preprocessed) AD-converted CDD-signal bit 0 (LSB)
VSSD(C2)
17
I
digital ground 2 for digital core and CLK1 related peripherals
SCLK
18
O
serial clock to TDA8786
VSSA(CD)
19
I
analog ground for control DAC
CDACOUT
20
O
output control DAC
CDACRBIAS
21
I
pin to connect external bias resistor for control DAC
VDDA(CD)
22
I
analog supply for control DAC
SDATA
23
O
serial data to TDA8786
STROBE
24
O
strobe to TDA8786
SMP
25
O
switch mode pulse for DC-DC
P0
26
O
quasi-static control output pin 0
P1
27
O
quasi-static control output pin 1
SIS
28
I
SNERT/I2C-bus select input signal
VDDD(C2)
29
I
digital supply 2 for digital core and CLK1 related peripherals
RESET
30
I
reset input
T2
31
I
test mode control signal bit 2
T1
32
I
test mode control signal bit 1
T0
33
I
test mode control signal bit 0
VSSA(OB)
34
I
analog ground for the three output buffers
OUT3
35
O
output buffer 3 (R, V or CVBS)
VDDA(O3)
36
I
analog supply for output buffer OUT3
OUT2
37
O
output buffer 2 (B, U or C)
VDDA(O2)
38
I
analog supply for output buffer OUT2
OUT1
39
O
output buffer 1 (G or Y)
VDDA(O1)
40
I
analog supply for output buffer OUT1
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